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From: Joonyoung Shim <jy0922.shim@samsung.com>
To: Gustavo Padovan <gustavo@padovan.org>, linux-samsung-soc@vger.kernel.org
Cc: Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/3] drm/exynos: reset temporary value after write to register
Date: Fri, 17 Apr 2015 14:49:33 +0900	[thread overview]
Message-ID: <55309EED.20206@samsung.com> (raw)
In-Reply-To: <1426775270-31137-2-git-send-email-gustavo@padovan.org>

Hi Gustavo,

On 03/19/2015 11:27 PM, Gustavo Padovan wrote:
> From: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
> 
> 'val' wasn't clean after its last usage, so we could get garbage value and
> send the wrong command to the hw.
> 
> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
> ---
>  drivers/gpu/drm/exynos/exynos_mixer.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
> index a95fe84..7aff88f 100644
> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
> @@ -687,7 +687,7 @@ static void mixer_win_reset(struct mixer_context *ctx)
>  	mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);
>  
>  	/* Blend layer 1 into layer 0 */
> -	val |= MXR_GRP_CFG_BLEND_PRE_MUL;

I know this is not wrong, current code means layer 1 needs above
register setting value of layer 0 as default.

Thanks.

> +	val = MXR_GRP_CFG_BLEND_PRE_MUL;
>  	val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
>  	mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);
>  
> 

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  reply	other threads:[~2015-04-17  5:49 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-19 14:27 [PATCH 1/3] drm/exynos: don't commit if plane scaling is required Gustavo Padovan
2015-03-19 14:27 ` [PATCH 2/3] drm/exynos: reset temporary value after write to register Gustavo Padovan
2015-04-17  5:49   ` Joonyoung Shim [this message]
2015-03-19 14:27 ` [PATCH 3/3] drm/exynos: enable/disable blend based on pixel format Gustavo Padovan
2015-04-17  6:16   ` Joonyoung Shim
     [not found]     ` <trinity-82a40b8e-a2bb-425f-a1c6-15696573bf32-1429273719156@3capp-gmx-bs40>
2015-04-17 12:31       ` Fw: " Tobias Jakobi
2015-04-17 12:55       ` Tobias Jakobi
2015-04-17 13:07         ` Ville Syrjälä
2015-03-19 23:11 ` [PATCH 1/3] drm/exynos: don't commit if plane scaling is required Tobias Jakobi
2015-03-25 23:19 ` Tobias Jakobi

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