From: Andrea Scian <rnd4@dave-tech.it>
To: ansaris@iwavesystems.com
Cc: meta-freescale@yoctoproject.org
Subject: Re: iMX6 - CPU frequency lowered during LDO bypass setting
Date: Fri, 17 Apr 2015 22:14:19 +0200 [thread overview]
Message-ID: <5531699B.5030204@dave-tech.it> (raw)
In-Reply-To: <55310495.1050005@iwavesystems.com>
Il 17/04/2015 15:03, ansaris ha scritto:
> We would like to know, during the LDO bypass settings why the CPU
> frequency is lowered in File-1(Linux 3.14.28_1.0.0-GA)? Is it
> recommended to do the same.?
I think that the answer is here:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/?id=404fd02e96d33840f58f83f88815e2a259cdc532
During bypass procedure you violate datasheet power constraint if
running at 800MHz: in LDO mode VDD_ARM must be 125mV higher that the LDO
output voltage, while you need to lower VDD_ARM (on PMIC) before
switching to bypass mode.
To fill the 125mV gap you need to:
- switch to 400MHz
- lower PMIC voltages
- switch to bypass mode (which remove the 125mV gap)
- switch back to 800MHz
If you skip the first step you may have 1.175-0.125 = 1.050V which is
below the required power supply for VDD_ARM
I think this is the meaning of the commit, please correct me if I'm
wrong, of course.
Kind Regards,
--
Andrea SCIAN
DAVE Embedded Systems
next prev parent reply other threads:[~2015-04-17 20:20 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <mailman.7.1429297201.9986.meta-freescale@yoctoproject.org>
[not found] ` <mailman.7.1429297201.9986.meta-freescale.{43881423-8100-40e6-8ca0-108fc65b010c}.0@yoctoproject.org>
2015-04-17 13:03 ` iMX6 - CPU frequency lowered during LDO bypass setting ansaris
2015-04-17 20:14 ` Andrea Scian [this message]
2015-04-20 12:44 ` Lauren Post
2015-04-20 12:53 ` ansaris
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