Re: PCID and TLB flushes (was: [GIT PULL] kdbus for 4.1-rc1)

[Dave Hansen <dave.hansen@intel.com>]

On 04/28/2015 03:15 PM, Kirill A. Shutemov wrote:
> On Tue, Apr 28, 2015 at 01:42:10PM -0700, Andy Lutomirski wrote:
>> At some point, I'd like to implement PCID on x86 (if no one beats me
>> to it, and this is a low priority for me), which will allow us to skip
>> expensive TLB flushes while context switching.  I have no idea whether
>> ARM can do something similar.
> 
> I talked with Dave about implementing PCID and he thinks that it will be
> net loss. TLB entries will live longer and it means we would need to trigger
> more IPIs to flash them out when we have to. Cost of IPIs will be higher
> than benifit from hot TLB after context switch.
> 
> Do you have different expectations?

Kirill, I think Andy is asking about something different that what you
and I talked about.  My point to you was that PCIDs can not be used to
to replace or in lieu of TLB shootdowns because they *only* make TLB
entries live longer.

Their entire purpose is to make things live longer and to reduce the
cost of the implicit TLB shootdowns that we do as a part of a context
switch.

I'm not sure if it will have a benefit overall.  It depends on the
increase in shootdown cost vs. the decrease in TLB refill cost at
context switch.

I think someone hacked up some code to do it (maybe just internally to
Intel), so if anyone is seriously interested in implementing it, let me
know and I'll see if I can dig it up.

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