From: Leon Alrae <leon.alrae@imgtec.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Yongbok Kim <yongbok.kim@imgtec.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 3/3] target-mips: Misaligned Memory Accesses for MSA
Date: Tue, 5 May 2015 15:51:16 +0100 [thread overview]
Message-ID: <5548D8E4.7000504@imgtec.com> (raw)
In-Reply-To: <CAFEAcA-t1TAg-CzmjDxbt+z1m9QcJWiq2jkrDkcQJzH=+2QqEw@mail.gmail.com>
On 01/05/2015 16:43, Peter Maydell wrote:
>> +#if !defined(CONFIG_USER_ONLY)
>> +static bool cpu_mips_validate_msa_block_access(CPUMIPSState *env,
>> + target_ulong address, int df, int rw)
>> +{
>> + int i;
>> + for (i = 0; i < DF_ELEMENTS(df); i++) {
>> + if (!cpu_mips_validate_access(env, address + (i << df),
>> + address, (1 << df), rw)) {
>> + CPUState *cs = CPU(mips_env_get_cpu(env));
>> + helper_raise_exception_err(env, cs->exception_index,
>> + env->error_code);
>
> I was wondering if this would get the correct PC in the exception
> case, but we always call save_cpu_state() before calling the
> msa_ld/st_df helpers, so it will.
FYI, quite recently Richard suggested a clean-up for this (and all other
MIPS load/store instructions using helpers), so save_cpu_state()
wouldn’t be required. I haven’t got round to it yet but sounds like a
nice improvement.
Leon
next prev parent reply other threads:[~2015-05-05 14:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-01 15:24 [Qemu-devel] [PATCH 0/3] target-mips: Add support for misaligned accesses Yongbok Kim
2015-05-01 15:24 ` [Qemu-devel] [PATCH 1/3] softmmu: Add size argument to do_unaligned_access() Yongbok Kim
2015-05-01 15:24 ` [Qemu-devel] [PATCH 2/3] target-mips: Misaligned Memory Accesses for R6 Yongbok Kim
2015-05-01 15:39 ` Peter Maydell
2015-05-01 15:24 ` [Qemu-devel] [PATCH 3/3] target-mips: Misaligned Memory Accesses for MSA Yongbok Kim
2015-05-01 15:43 ` Peter Maydell
2015-05-01 15:55 ` Yongbok Kim
2015-05-05 14:51 ` Leon Alrae [this message]
2015-05-05 19:54 ` Leon Alrae
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