From: Alexander Graf <agraf@suse.de>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10%
Date: Fri, 08 May 2015 00:26:09 +0200 [thread overview]
Message-ID: <554BE681.4010003@suse.de> (raw)
In-Reply-To: <1430810304-7904-1-git-send-email-pbonzini@redhat.com>
On 05.05.15 09:18, Paolo Bonzini wrote:
> Patches 1 and 2 enable support from more than 8 MMU modes in TCG (patch
> 1 is in the targets, patch 2 is in cpu-defs.h). The TLB size is reduced
> proportionally on targets where that is necessary.
>
> Patch 3 uses the new support in the PPC target.
>
> Paolo
>
> v2->v3: - change i386 TCG_TARGET_TLB_DISPLACEMENT_BITS to 31 [rth]
> - tweak comment in patch 2 to account for
> offsetof(CPUArchState, tlb_table[mem_index][0].addend) [rth]
Richard, I would greatly appreciate a final Reviewed-by from you on this
patch set :).
Alex
next prev parent reply other threads:[~2015-05-07 22:26 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-05 7:18 [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Paolo Bonzini
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 1/3] tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS Paolo Bonzini
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 2/3] softmmu: support up to 12 MMU modes Paolo Bonzini
2015-05-18 17:00 ` Alexander Graf
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 3/3] target-ppc: use separate indices for various translation modes Paolo Bonzini
2015-06-02 16:06 ` Alexander Graf
2015-05-05 15:49 ` [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Richard Henderson
2015-05-08 1:15 ` Alexander Graf
2015-05-07 22:26 ` Alexander Graf [this message]
2015-06-11 8:59 ` Artyom Tarasenko
2015-06-15 15:50 ` Richard Henderson
2015-06-15 16:00 ` Artyom Tarasenko
2015-06-15 16:29 ` Richard Henderson
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