From: Alexander Graf <agraf@suse.de>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v2 2/3] softmmu: support up to 12 MMU modes
Date: Mon, 18 May 2015 19:00:54 +0200 [thread overview]
Message-ID: <555A1AC6.6050900@suse.de> (raw)
In-Reply-To: <1430810304-7904-3-git-send-email-pbonzini@redhat.com>
On 05/05/2015 09:18 AM, Paolo Bonzini wrote:
> At 8k per TLB (for 64-bit host or target), 8 or more modes
> make the TLBs bigger than 64k, and some RISC TCG backends do
> not like that. On the affected hosts, cut the TLB size in
> half---there is still a measurable speedup on PPC with the
> next patch.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> Message-Id: <1424436345-37924-3-git-send-email-pbonzini@redhat.com>
This patch breaks compilation with TCI:
https://travis-ci.org/agraf/qemu/jobs/63013710
Alex
next prev parent reply other threads:[~2015-05-18 17:01 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-05 7:18 [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Paolo Bonzini
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 1/3] tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS Paolo Bonzini
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 2/3] softmmu: support up to 12 MMU modes Paolo Bonzini
2015-05-18 17:00 ` Alexander Graf [this message]
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 3/3] target-ppc: use separate indices for various translation modes Paolo Bonzini
2015-06-02 16:06 ` Alexander Graf
2015-05-05 15:49 ` [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Richard Henderson
2015-05-08 1:15 ` Alexander Graf
2015-05-07 22:26 ` Alexander Graf
2015-06-11 8:59 ` Artyom Tarasenko
2015-06-15 15:50 ` Richard Henderson
2015-06-15 16:00 ` Artyom Tarasenko
2015-06-15 16:29 ` Richard Henderson
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