[PATCH v6 0/3] Set SMMU s2 input-size based on p2m tables

[PATCH v6 0/3] Set SMMU s2 input-size based on p2m tables

[Edgar E. Iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Hi,

This is a fix for the issue I'm seeing on ZynqMP with missmatched
setup of the SMMU and the shared p2m page-tables with the CPU.

This implements a global p2m_ipa_bits cap for S2 input-size as
discussed in the previous RFC.

Best regards,
Edgar

Changelog:
v5 -> v6:
* Remove const from ARM32 to fix the build.
* Reuse p2m_ipa_bits in info print

v4 -> v5:
* Make p2m_ipa_bits __read_mostly.
* Make p2m_ipa_bits const for ARM32.

v3 -> v4:
* Replace ASSERT on supported IPA sizes with returnig error.
* Remove redundant 'addresses' after IPA.

v2 -> v3:
* pfn -> ipa.
* Fix typos in commit msg for 3/3.

v1 -> v2:
* Use a global pfn bitsize instead of a per-domain one.

Edgar E. Iglesias (3):
  xen/arm: Re-order iommu_setup to after setup_virt_paging
  xen/arm: Add p2m_ipa_bits
  xen/iommu: arm: Use p2m_ipa_bits as stage2 input size

 xen/arch/arm/p2m.c                 |  6 +++++-
 xen/arch/arm/setup.c               |  4 ++--
 xen/drivers/passthrough/arm/smmu.c | 10 ++++++++--
 xen/include/asm-arm/p2m.h          |  3 +++
 4 files changed, 18 insertions(+), 5 deletions(-)

-- 
1.9.1

[PATCH v6 1/3] xen/arm: Re-order iommu_setup to after setup_virt_paging

[Edgar E. Iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

This is needed to allow the paging setup to probe for
IPA bit sizes to be used in p2m tables prior to iommu setup.

Acked-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 xen/arch/arm/setup.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 4ec7c13..797673b 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -800,8 +800,6 @@ void __init start_xen(unsigned long boot_phys_offset,
     local_irq_enable();
     local_abort_enable();
 
-    iommu_setup();
-
     smp_prepare_cpus(cpus);
 
     initialize_keytable();
@@ -825,6 +823,8 @@ void __init start_xen(unsigned long boot_phys_offset,
 
     setup_virt_paging();
 
+    iommu_setup();
+
     do_initcalls();
 
     /* Create initial domain 0. */
-- 
1.9.1

[PATCH v6 2/3] xen/arm: Add p2m_ipa_bits

[Edgar E. Iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Export p2m_ipa_bits holding the bit size of IPAs used in p2m tables.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 xen/arch/arm/p2m.c        | 6 +++++-
 xen/include/asm-arm/p2m.h | 3 +++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 59dd23a..903fa3f 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -27,6 +27,8 @@ static unsigned int __read_mostly p2m_root_level;
 
 #define P2M_ROOT_PAGES    (1<<P2M_ROOT_ORDER)
 
+unsigned int __read_mostly p2m_ipa_bits;
+
 static bool_t p2m_valid(lpae_t pte)
 {
     return pte.p2m.valid;
@@ -1518,6 +1520,7 @@ void __init setup_virt_paging(void)
 
 #ifdef CONFIG_ARM_32
     printk("P2M: 40-bit IPA\n");
+    p2m_ipa_bits = 40;
     val |= VTCR_T0SZ(0x18); /* 40 bit IPA */
     val |= VTCR_SL0(0x1); /* P2M starts at first level */
 #else /* CONFIG_ARM_64 */
@@ -1560,9 +1563,10 @@ void __init setup_virt_paging(void)
 
     p2m_root_order = pa_range_info[pa_range].root_order;
     p2m_root_level = 2 - pa_range_info[pa_range].sl0;
+    p2m_ipa_bits = 64 - pa_range_info[pa_range].t0sz;
 
     printk("P2M: %d-bit IPA with %d-bit PA\n",
-           64 - pa_range_info[pa_range].t0sz,
+           p2m_ipa_bits,
            pa_range_info[pa_range].pabits);
 #endif
     printk("P2M: %d levels with order-%d root, VTCR 0x%lx\n",
diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h
index 341df55..63748ef 100644
--- a/xen/include/asm-arm/p2m.h
+++ b/xen/include/asm-arm/p2m.h
@@ -10,6 +10,9 @@
 
 #define paddr_bits PADDR_BITS
 
+/* Holds the bit size of IPAs in p2m tables.  */
+extern unsigned int p2m_ipa_bits;
+
 struct domain;
 
 extern void memory_type_changed(struct domain *);
-- 
1.9.1

[PATCH v6 3/3] xen/iommu: arm: Use p2m_ipa_bits as stage2 input size

[Edgar E. Iglesias]

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

The Stage2 input-size must match what the CPU uses because
the SMMU and the CPU share page-tables.

Test that the SMMU supports the P2M IPA bit size, use it if
supported or bail out if not.

Reviewed-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 xen/drivers/passthrough/arm/smmu.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
index 8a9b58b..d9f3931 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -2230,8 +2230,14 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
 	size = arm_smmu_id_size_to_bits((id >> ID2_IAS_SHIFT) & ID2_IAS_MASK);
 	smmu->s1_output_size = min_t(unsigned long, PHYS_MASK_SHIFT, size);
 
-	/* Xen: Stage-2 input size is not restricted */
-	smmu->s2_input_size = size;
+	/* Xen: Stage-2 input size has to match p2m_ipa_bits.  */
+	if (size < p2m_ipa_bits) {
+		dev_err(smmu->dev,
+			"P2M IPA size not supported (P2M=%u SMMU=%lu)!\n",
+			p2m_ipa_bits, size);
+		return -ENODEV;
+	}
+	smmu->s2_input_size = p2m_ipa_bits;
 #if 0
 	/* Stage-2 input size limited due to pgd allocation (PTRS_PER_PGD) */
 #ifdef CONFIG_64BIT
-- 
1.9.1

Re: [PATCH v6 2/3] xen/arm: Add p2m_ipa_bits

[Julien Grall]

Hi Edgar,

On 08/05/15 08:10, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Export p2m_ipa_bits holding the bit size of IPAs used in p2m tables.
> 
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Julien Grall <julien.grall@citrix.com>

Regards,

-- 
Julien Grall

Re: [PATCH v6 0/3] Set SMMU s2 input-size based on p2m tables

[Ian Campbell]

On Fri, 2015-05-08 at 17:10 +1000, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Hi,
> 
> This is a fix for the issue I'm seeing on ZynqMP with missmatched
> setup of the SMMU and the shared p2m page-tables with the CPU.
> 
> This implements a global p2m_ipa_bits cap for S2 input-size as
> discussed in the previous RFC.

Acked + applied, thanks.

> 
> Best regards,
> Edgar
> 
> Changelog:
> v5 -> v6:
> * Remove const from ARM32 to fix the build.
> * Reuse p2m_ipa_bits in info print
> 
> v4 -> v5:
> * Make p2m_ipa_bits __read_mostly.
> * Make p2m_ipa_bits const for ARM32.
> 
> v3 -> v4:
> * Replace ASSERT on supported IPA sizes with returnig error.
> * Remove redundant 'addresses' after IPA.
> 
> v2 -> v3:
> * pfn -> ipa.
> * Fix typos in commit msg for 3/3.
> 
> v1 -> v2:
> * Use a global pfn bitsize instead of a per-domain one.
> 
> Edgar E. Iglesias (3):
>   xen/arm: Re-order iommu_setup to after setup_virt_paging
>   xen/arm: Add p2m_ipa_bits
>   xen/iommu: arm: Use p2m_ipa_bits as stage2 input size
> 
>  xen/arch/arm/p2m.c                 |  6 +++++-
>  xen/arch/arm/setup.c               |  4 ++--
>  xen/drivers/passthrough/arm/smmu.c | 10 ++++++++--
>  xen/include/asm-arm/p2m.h          |  3 +++
>  4 files changed, 18 insertions(+), 5 deletions(-)
>