From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: David Daney <ddaney.cavm@gmail.com>
Cc: <linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>,
<ralf@linux-mips.org>
Subject: Re: [PATCH] MIPS64: 48 bit physaddr support in memory maps
Date: Wed, 13 May 2015 15:58:42 -0700 [thread overview]
Message-ID: <5553D722.1030205@imgtec.com> (raw)
In-Reply-To: <5553C68C.6000000@gmail.com>
On 05/13/2015 02:47 PM, David Daney wrote:
> On 05/13/2015 11:55 AM, Leonid Yegoshin wrote:
>> Originally, it was set to 40bits only but I6400 has 48bits of physaddr.
>>
>
> Why not go to the architectural limit of 59 bits?
>
Because any physaddr should fit PTE and EntryLo register and we also
need 5 or 7 SW bits in PTE.
Even with fixed PTE bits layout from
http://patchwork.linux-mips.org/patch/7613/
we need 5 or 7 additional bits, so the real limit is 54. And 54 is
actually specified as a limit in EntryLo starting from MIPS R2.
WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
ralf@linux-mips.org
Subject: Re: [PATCH] MIPS64: 48 bit physaddr support in memory maps
Date: Wed, 13 May 2015 15:58:42 -0700 [thread overview]
Message-ID: <5553D722.1030205@imgtec.com> (raw)
Message-ID: <20150513225842.nNFeIcKWTZjldIFvbWFxN6Qjrb0hpBeMe4jGT6694v0@z> (raw)
In-Reply-To: <5553C68C.6000000@gmail.com>
On 05/13/2015 02:47 PM, David Daney wrote:
> On 05/13/2015 11:55 AM, Leonid Yegoshin wrote:
>> Originally, it was set to 40bits only but I6400 has 48bits of physaddr.
>>
>
> Why not go to the architectural limit of 59 bits?
>
Because any physaddr should fit PTE and EntryLo register and we also
need 5 or 7 SW bits in PTE.
Even with fixed PTE bits layout from
http://patchwork.linux-mips.org/patch/7613/
we need 5 or 7 additional bits, so the real limit is 54. And 54 is
actually specified as a limit in EntryLo starting from MIPS R2.
next prev parent reply other threads:[~2015-05-13 22:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-13 18:55 [PATCH] MIPS64: 48 bit physaddr support in memory maps Leonid Yegoshin
2015-05-13 18:55 ` Leonid Yegoshin
2015-05-13 21:47 ` David Daney
2015-05-13 22:58 ` Leonid Yegoshin [this message]
2015-05-13 22:58 ` Leonid Yegoshin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5553D722.1030205@imgtec.com \
--to=leonid.yegoshin@imgtec.com \
--cc=ddaney.cavm@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=ralf@linux-mips.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.