All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v1] x86/pvh: disable posted interrupts
@ 2015-05-22 11:20 Roger Pau Monne
  2015-05-27  9:31 ` Roger Pau Monné
  0 siblings, 1 reply; 2+ messages in thread
From: Roger Pau Monne @ 2015-05-22 11:20 UTC (permalink / raw)
  To: xen-devel
  Cc: Kevin Tian, Jun Nakajima, Andrew Cooper, Eddie Dong, Jan Beulich,
	Roger Pau Monne

Enabling posted interrupts requires the virtual interrupt delivery feature,
which is disabled for PVH guests, so make sure posted interrupts are also
disabled or else vmlaunch will fail.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reported-and-Tested-by: Lars Eggert <lars@netapp.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Cc: Jun Nakajima <jun.nakajima@intel.com>
Cc: Eddie Dong <eddie.dong@intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/hvm/vmx/vmcs.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a714549..9827a8e 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -980,6 +980,10 @@ static int construct_vmcs(struct vcpu *v)
         v->arch.hvm_vmx.secondary_exec_control &=
             ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
 
+        /* Disable posted interrupts */
+        __vmwrite(PIN_BASED_VM_EXEC_CONTROL,
+            vmx_pin_based_exec_control & ~PIN_BASED_POSTED_INTERRUPT);
+
         /* Start in 64-bit mode. PVH 32bitfixme. */
         vmentry_ctl |= VM_ENTRY_IA32E_MODE;       /* GUEST_EFER.LME/LMA ignored */
 
-- 
1.9.5 (Apple Git-50.3)


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v1] x86/pvh: disable posted interrupts
  2015-05-22 11:20 [PATCH v1] x86/pvh: disable posted interrupts Roger Pau Monne
@ 2015-05-27  9:31 ` Roger Pau Monné
  0 siblings, 0 replies; 2+ messages in thread
From: Roger Pau Monné @ 2015-05-27  9:31 UTC (permalink / raw)
  To: xen-devel
  Cc: Andrew Cooper, Kevin Tian, Eddie Dong, Jan Beulich, Jun Nakajima

El 22/05/15 a les 12.20, Roger Pau Monne ha escrit:
> Enabling posted interrupts requires the virtual interrupt delivery feature,
> which is disabled for PVH guests, so make sure posted interrupts are also
> disabled or else vmlaunch will fail.
> 
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
> Reported-and-Tested-by: Lars Eggert <lars@netapp.com>
> Acked-by: Kevin Tian <kevin.tian@intel.com>
> Cc: Jun Nakajima <jun.nakajima@intel.com>
> Cc: Eddie Dong <eddie.dong@intel.com>
> Cc: Kevin Tian <kevin.tian@intel.com>
> Cc: Jan Beulich <jbeulich@suse.com>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
>  xen/arch/x86/hvm/vmx/vmcs.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
> index a714549..9827a8e 100644
> --- a/xen/arch/x86/hvm/vmx/vmcs.c
> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
> @@ -980,6 +980,10 @@ static int construct_vmcs(struct vcpu *v)
>          v->arch.hvm_vmx.secondary_exec_control &=
>              ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
>  
> +        /* Disable posted interrupts */

Looks like I didn't refresh the patch before sending it, new version
coming (hopefully with the proper version number and comment this time).

Roger.


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2015-05-27 10:06 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-05-22 11:20 [PATCH v1] x86/pvh: disable posted interrupts Roger Pau Monne
2015-05-27  9:31 ` Roger Pau Monné

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.