* [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits
@ 2015-05-29 13:43 ` Markos Chandras
0 siblings, 0 replies; 4+ messages in thread
From: Markos Chandras @ 2015-05-29 13:43 UTC (permalink / raw)
To: linux-mips; +Cc: Markos Chandras, Steven J. Hill
Commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
rearranged the PTE bits into fixed positions in preparation for the XPA
support. However, this patch broke R6 since it only took R2 cores
into consideration for the RI/XI bits leading to boot failures. We fix
this by adding the missing CONFIG_CPU_MIPSR6 definitions
Fixes: be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
This is a bugfix for a bug introduced in 4.1-rc1. Can we please have
this patch in 4.1?
---
arch/mips/include/asm/pgtable-bits.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index 18ae5ddef118..c28a8499aec7 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -113,7 +113,7 @@
#define _PAGE_PRESENT_SHIFT 0
#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
/* R2 or later cores check for RI/XI support to determine _PAGE_READ */
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
#define _PAGE_WRITE_SHIFT (_PAGE_PRESENT_SHIFT + 1)
#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
#else
@@ -135,16 +135,16 @@
#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT)
/* Only R2 or newer cores have the XI bit */
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
#define _PAGE_NO_EXEC_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
#else
#define _PAGE_GLOBAL_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
-#endif /* CONFIG_CPU_MIPSR2 */
+#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
#endif /* CONFIG_64BIT && CONFIG_MIPS_HUGE_TLB_SUPPORT */
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
/* XI - page cannot be executed */
#ifndef _PAGE_NO_EXEC_SHIFT
#define _PAGE_NO_EXEC_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
@@ -160,10 +160,10 @@
#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
-#else /* !CONFIG_CPU_MIPSR2 */
+#else /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR6 */
#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
-#endif /* CONFIG_CPU_MIPSR2 */
+#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
@@ -205,7 +205,7 @@
*/
static inline uint64_t pte_to_entrylo(unsigned long pte_val)
{
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
if (cpu_has_rixi) {
int sa;
#ifdef CONFIG_32BIT
--
2.4.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits
@ 2015-05-29 13:43 ` Markos Chandras
0 siblings, 0 replies; 4+ messages in thread
From: Markos Chandras @ 2015-05-29 13:43 UTC (permalink / raw)
To: linux-mips; +Cc: Markos Chandras, Steven J. Hill
Commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
rearranged the PTE bits into fixed positions in preparation for the XPA
support. However, this patch broke R6 since it only took R2 cores
into consideration for the RI/XI bits leading to boot failures. We fix
this by adding the missing CONFIG_CPU_MIPSR6 definitions
Fixes: be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
This is a bugfix for a bug introduced in 4.1-rc1. Can we please have
this patch in 4.1?
---
arch/mips/include/asm/pgtable-bits.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index 18ae5ddef118..c28a8499aec7 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -113,7 +113,7 @@
#define _PAGE_PRESENT_SHIFT 0
#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
/* R2 or later cores check for RI/XI support to determine _PAGE_READ */
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
#define _PAGE_WRITE_SHIFT (_PAGE_PRESENT_SHIFT + 1)
#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
#else
@@ -135,16 +135,16 @@
#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT)
/* Only R2 or newer cores have the XI bit */
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
#define _PAGE_NO_EXEC_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
#else
#define _PAGE_GLOBAL_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
-#endif /* CONFIG_CPU_MIPSR2 */
+#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
#endif /* CONFIG_64BIT && CONFIG_MIPS_HUGE_TLB_SUPPORT */
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
/* XI - page cannot be executed */
#ifndef _PAGE_NO_EXEC_SHIFT
#define _PAGE_NO_EXEC_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
@@ -160,10 +160,10 @@
#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
-#else /* !CONFIG_CPU_MIPSR2 */
+#else /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR6 */
#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
-#endif /* CONFIG_CPU_MIPSR2 */
+#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
@@ -205,7 +205,7 @@
*/
static inline uint64_t pte_to_entrylo(unsigned long pte_val)
{
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
if (cpu_has_rixi) {
int sa;
#ifdef CONFIG_32BIT
--
2.4.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits
@ 2015-06-04 11:17 ` Markos Chandras
0 siblings, 0 replies; 4+ messages in thread
From: Markos Chandras @ 2015-06-04 11:17 UTC (permalink / raw)
To: linux-mips; +Cc: Steven J. Hill, Ralf Baechle
On 05/29/2015 02:43 PM, Markos Chandras wrote:
> Commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> rearranged the PTE bits into fixed positions in preparation for the XPA
> support. However, this patch broke R6 since it only took R2 cores
> into consideration for the RI/XI bits leading to boot failures. We fix
> this by adding the missing CONFIG_CPU_MIPSR6 definitions
>
> Fixes: be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
> This is a bugfix for a bug introduced in 4.1-rc1. Can we please have
> this patch in 4.1?
> ---
Ralf,
I see you merged this patch (thanks!) but it's in the wrong branch it
seems. It's not in the 4.1-fixes I think. Can you please schedule this
patch for 4.1 since it's a bugfix? Otherwise R6 won't even boot in 4.1.
Thank you
--
markos
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits
@ 2015-06-04 11:17 ` Markos Chandras
0 siblings, 0 replies; 4+ messages in thread
From: Markos Chandras @ 2015-06-04 11:17 UTC (permalink / raw)
To: linux-mips; +Cc: Steven J. Hill, Ralf Baechle
On 05/29/2015 02:43 PM, Markos Chandras wrote:
> Commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> rearranged the PTE bits into fixed positions in preparation for the XPA
> support. However, this patch broke R6 since it only took R2 cores
> into consideration for the RI/XI bits leading to boot failures. We fix
> this by adding the missing CONFIG_CPU_MIPSR6 definitions
>
> Fixes: be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
> This is a bugfix for a bug introduced in 4.1-rc1. Can we please have
> this patch in 4.1?
> ---
Ralf,
I see you merged this patch (thanks!) but it's in the wrong branch it
seems. It's not in the 4.1-fixes I think. Can you please schedule this
patch for 4.1 since it's a bugfix? Otherwise R6 won't even boot in 4.1.
Thank you
--
markos
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-06-04 11:17 UTC | newest]
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2015-05-29 13:43 [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits Markos Chandras
2015-05-29 13:43 ` Markos Chandras
2015-06-04 11:17 ` Markos Chandras
2015-06-04 11:17 ` Markos Chandras
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