Re: [PATCH v3 2/3] spi: atmel: update DT bindings documentation

[Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>]

Le 09/06/2015 13:53, Cyrille Pitchen a écrit :
> - add new property "atmel,fifo-size"
> - change "cs-gpios" to optional for SPI controller version >= 2.
> 
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

> ---
>  Documentation/devicetree/bindings/spi/spi_atmel.txt | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi_atmel.txt b/Documentation/devicetree/bindings/spi/spi_atmel.txt
> index 4f8184d..fb588b3 100644
> --- a/Documentation/devicetree/bindings/spi/spi_atmel.txt
> +++ b/Documentation/devicetree/bindings/spi/spi_atmel.txt
> @@ -4,11 +4,16 @@ Required properties:
>  - compatible : should be "atmel,at91rm9200-spi".
>  - reg: Address and length of the register set for the device
>  - interrupts: Should contain spi interrupt
> -- cs-gpios: chipselects
> +- cs-gpios: chipselects (optional for SPI controller version >= 2 with the
> +  Chip Select Active After Transfer feature).
>  - clock-names: tuple listing input clock names.
>  	Required elements: "spi_clk"
>  - clocks: phandles to input clocks.
>  
> +Optional properties:
> +- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
> +  capable SPI controllers.
> +
>  Example:
>  
>  spi1: spi@fffcc000 {
> @@ -20,6 +25,7 @@ spi1: spi@fffcc000 {
>  	clocks = <&spi1_clk>;
>  	clock-names = "spi_clk";
>  	cs-gpios = <&pioB 3 0>;
> +	atmel,fifo-size = <32>;
>  	status = "okay";
>  
>  	mmc-slot@0 {
> 


-- 
Nicolas Ferre
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