* [PATCH v2] xen: arm: Do not expose PMU to domain 0
@ 2015-06-17 12:37 Ian Campbell
2015-06-17 12:45 ` Julien Grall
0 siblings, 1 reply; 3+ messages in thread
From: Ian Campbell @ 2015-06-17 12:37 UTC (permalink / raw)
To: xen-devel; +Cc: julien.grall, tim, Ian Campbell, stefano.stabellini
It uses a PPI which we cannot route to a guest, and will surely need
more support than just that anyway.
I noticed this on Mustang with UEFI where the built in DTB contains a
node of this type.
According to linux/Documentation/devicetree/bindings/arm/pmu.txt the
ARM v7 (Cortex-A{7,15}) PMUs require a PPI too, so blacklist them as
well.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/arch/arm/domain_build.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 1e545fe..e9cb8a9 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -1105,6 +1105,9 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
DT_MATCH_COMPATIBLE("multiboot,module"),
DT_MATCH_COMPATIBLE("arm,psci"),
DT_MATCH_COMPATIBLE("arm,psci-0.2"),
+ DT_MATCH_COMPATIBLE("arm,cortex-a7-pmu"),
+ DT_MATCH_COMPATIBLE("arm,cortex-a15-pmu"),
+ DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
DT_MATCH_PATH("/cpus"),
DT_MATCH_TYPE("memory"),
/* The memory mapped timer is not supported by Xen. */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] xen: arm: Do not expose PMU to domain 0
2015-06-17 12:37 [PATCH v2] xen: arm: Do not expose PMU to domain 0 Ian Campbell
@ 2015-06-17 12:45 ` Julien Grall
2015-06-17 13:34 ` Ian Campbell
0 siblings, 1 reply; 3+ messages in thread
From: Julien Grall @ 2015-06-17 12:45 UTC (permalink / raw)
To: Ian Campbell, xen-devel; +Cc: tim, stefano.stabellini
Hi Ian,
On 17/06/15 13:37, Ian Campbell wrote:
> It uses a PPI which we cannot route to a guest, and will surely need
> more support than just that anyway.
>
> I noticed this on Mustang with UEFI where the built in DTB contains a
> node of this type.
>
> According to linux/Documentation/devicetree/bindings/arm/pmu.txt the
> ARM v7 (Cortex-A{7,15}) PMUs require a PPI too, so blacklist them as
> well.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@citrix.com>
Regards,
--
Julien Grall
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] xen: arm: Do not expose PMU to domain 0
2015-06-17 12:45 ` Julien Grall
@ 2015-06-17 13:34 ` Ian Campbell
0 siblings, 0 replies; 3+ messages in thread
From: Ian Campbell @ 2015-06-17 13:34 UTC (permalink / raw)
To: Julien Grall; +Cc: stefano.stabellini, tim, xen-devel
On Wed, 2015-06-17 at 13:45 +0100, Julien Grall wrote:
> Hi Ian,
>
> On 17/06/15 13:37, Ian Campbell wrote:
> > It uses a PPI which we cannot route to a guest, and will surely need
> > more support than just that anyway.
> >
> > I noticed this on Mustang with UEFI where the built in DTB contains a
> > node of this type.
> >
> > According to linux/Documentation/devicetree/bindings/arm/pmu.txt the
> > ARM v7 (Cortex-A{7,15}) PMUs require a PPI too, so blacklist them as
> > well.
> >
> > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
>
> Reviewed-by: Julien Grall <julien.grall@citrix.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2015-06-17 13:34 UTC | newest]
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2015-06-17 12:37 [PATCH v2] xen: arm: Do not expose PMU to domain 0 Ian Campbell
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