From: Andre Przywara <andre.przywara@arm.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Will Deacon <Will.Deacon@arm.com>
Cc: "kvm-ppc@vger.kernel.org" <kvm-ppc@vger.kernel.org>,
Michael Ellerman <mpe@ellerman.id.au>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [PATCH] kvmtool: Makefile: allow overriding CC and LD
Date: Fri, 19 Jun 2015 10:23:21 +0000 [thread overview]
Message-ID: <5583ED99.9050808@arm.com> (raw)
In-Reply-To: <5583E816.3090705@redhat.com>
Hi Paolo,
On 19/06/15 10:59, Paolo Bonzini wrote:
>
>
> On 18/06/2015 17:50, Andre Przywara wrote:
>> Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same
>> for LD.
>> Allow people to override the compiler name by specifying it explicitly
>> on the command line or via the environment.
>> Beside calling a certain compiler binary this allows to pass in
>> options to the compiler, which lets us get rid of the PowerPC
>> overrides in the Makefile. Possible uses:
>> $ make CC="gcc -m64" LD="ld -melf64ppc"
>> (build kvmtool on a PowerPC toolchain defaulting to 32-bit)
>> $ make CC="gcc -m32" LD="ld -melf_i386"
>> (build a 32-bit binary on a multilib-enabled x86-64 compiler)
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Makefile | 10 ++++++----
>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/Makefile b/Makefile
>> index 6110b8e..888bee5 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -14,9 +14,13 @@ export E Q
>> include config/utilities.mak
>> include config/feature-tests.mak
>>
>> -CC := $(CROSS_COMPILE)gcc
>> +ifeq ($(origin CC), default)
>> + CC := $(CROSS_COMPILE)gcc
>> +endif
>> CFLAGS :>> -LD := $(CROSS_COMPILE)ld
>> +ifeq ($(origin LD), default)
>> + LD := $(CROSS_COMPILE)ld
>> +endif
>
> I know zero about the kvmtool build system,
Well, it inherits a lot from the kernel ;-)
> but that ought not to be
> necessary. The make manual says:
>
> "If a variable has been set with a command argument (*note Overriding
> Variables: Overriding.), then ordinary assignments in the makefile are
> ignored."
Right, there was this nasty difference between "CC=gcc make" and
"make CC=gcc". So I agree that the latter works even without that patch.
Guess I was only looking at the environment here.
Paolo, thanks for pointing out!
Will, please ignore this patch then.
Cheers,
Andre.
>
> Paolo
>
>> LDFLAGS :>>
>> FIND := find
>> @@ -148,8 +152,6 @@ ifeq ($(ARCH), powerpc)
>> OBJS += powerpc/spapr_pci.o
>> OBJS += powerpc/xics.o
>> ARCH_INCLUDE := powerpc/include
>> - CFLAGS += -m64
>> - LDFLAGS += -m elf64ppc
>>
>> ARCH_WANT_LIBFDT := y
>> endif
>>
>
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Will Deacon <Will.Deacon@arm.com>
Cc: "kvm-ppc@vger.kernel.org" <kvm-ppc@vger.kernel.org>,
Michael Ellerman <mpe@ellerman.id.au>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [PATCH] kvmtool: Makefile: allow overriding CC and LD
Date: Fri, 19 Jun 2015 11:23:21 +0100 [thread overview]
Message-ID: <5583ED99.9050808@arm.com> (raw)
In-Reply-To: <5583E816.3090705@redhat.com>
Hi Paolo,
On 19/06/15 10:59, Paolo Bonzini wrote:
>
>
> On 18/06/2015 17:50, Andre Przywara wrote:
>> Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same
>> for LD.
>> Allow people to override the compiler name by specifying it explicitly
>> on the command line or via the environment.
>> Beside calling a certain compiler binary this allows to pass in
>> options to the compiler, which lets us get rid of the PowerPC
>> overrides in the Makefile. Possible uses:
>> $ make CC="gcc -m64" LD="ld -melf64ppc"
>> (build kvmtool on a PowerPC toolchain defaulting to 32-bit)
>> $ make CC="gcc -m32" LD="ld -melf_i386"
>> (build a 32-bit binary on a multilib-enabled x86-64 compiler)
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Makefile | 10 ++++++----
>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/Makefile b/Makefile
>> index 6110b8e..888bee5 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -14,9 +14,13 @@ export E Q
>> include config/utilities.mak
>> include config/feature-tests.mak
>>
>> -CC := $(CROSS_COMPILE)gcc
>> +ifeq ($(origin CC), default)
>> + CC := $(CROSS_COMPILE)gcc
>> +endif
>> CFLAGS :=
>> -LD := $(CROSS_COMPILE)ld
>> +ifeq ($(origin LD), default)
>> + LD := $(CROSS_COMPILE)ld
>> +endif
>
> I know zero about the kvmtool build system,
Well, it inherits a lot from the kernel ;-)
> but that ought not to be
> necessary. The make manual says:
>
> "If a variable has been set with a command argument (*note Overriding
> Variables: Overriding.), then ordinary assignments in the makefile are
> ignored."
Right, there was this nasty difference between "CC=gcc make" and
"make CC=gcc". So I agree that the latter works even without that patch.
Guess I was only looking at the environment here.
Paolo, thanks for pointing out!
Will, please ignore this patch then.
Cheers,
Andre.
>
> Paolo
>
>> LDFLAGS :=
>>
>> FIND := find
>> @@ -148,8 +152,6 @@ ifeq ($(ARCH), powerpc)
>> OBJS += powerpc/spapr_pci.o
>> OBJS += powerpc/xics.o
>> ARCH_INCLUDE := powerpc/include
>> - CFLAGS += -m64
>> - LDFLAGS += -m elf64ppc
>>
>> ARCH_WANT_LIBFDT := y
>> endif
>>
>
next prev parent reply other threads:[~2015-06-19 10:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-18 15:50 [PATCH] kvmtool: Makefile: allow overriding CC and LD Andre Przywara
2015-06-18 15:50 ` Andre Przywara
2015-06-19 1:14 ` Michael Ellerman
2015-06-19 1:14 ` Michael Ellerman
2015-06-19 10:00 ` Andre Przywara
2015-06-19 10:00 ` Andre Przywara
2015-06-19 9:59 ` Paolo Bonzini
2015-06-19 9:59 ` Paolo Bonzini
2015-06-19 10:23 ` Andre Przywara [this message]
2015-06-19 10:23 ` Andre Przywara
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