Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli <f.fainelli@gmail.com>]

Le 06/25/15 01:52, Jaedon Shin a écrit :
> 
>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>
>> +Brian,
>>
>> On 23/06/15 23:08, Jaedon Shin wrote:
>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>
>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>> ---
>>
>> [snip]
>>
>>> +
>>> +&nand0 {
>>> +	status = "okay";
>>> +
>>> +	nandcs@1 {
>>> +		compatible = "brcm,nandcs";
>>> +		reg = <1>;
>>> +		nand-ecc-step-size = <512>;
>>> +		nand-ecc-strength = <8>;
>>> +		nand-on-flash-bbt;
>>> +
>>> +		#size-cells = <2>;
>>> +		#address-cells = <2>;
>>> +
>>> +		flash1.rootfs0@0 {
>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>> +		};
>>> +
>>> +		flash1.rootfs1@80000000 {
>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>> +		};
>>> +	};
>>> +};
>>
>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>> of duplication between DTS files?
>> -- 
>> Florian
> 
> I Think that is not duplication.
> 
> I have no reference boards, but this node is maybe explaining for hardware
> description of the BCM97346DBSMB reference board. The nodes are changed by
> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
> brcmnand-cs1-512-4 for others.

Then I am confused, your 4 patches add identical NAND flash chip
properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
size and 8 bits of ECC strength, am I missing something?
-- 
Florian