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From: Joonyoung Shim <jy0922.shim@samsung.com>
To: Andrzej Hajda <a.hajda@samsung.com>, inki.dae@samsung.com
Cc: Kyungmin Park <kyungmin.park@samsung.com>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	b.zolnierkie@samsung.com
Subject: Re: [PATCH RESEND v2 2/6] drm/exynos/mixer: fix interrupt clearing
Date: Thu, 09 Jul 2015 18:05:48 +0900	[thread overview]
Message-ID: <559E396C.4060802@samsung.com> (raw)
In-Reply-To: <1436429273-24144-1-git-send-email-a.hajda@samsung.com>

On 07/09/2015 05:07 PM, Andrzej Hajda wrote:
> The driver used incorrect flags to clear interrupt status.
> The patch fixes it.
> 
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/gpu/drm/exynos/exynos_mixer.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
> index cae98db..25f0aac 100644
> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
> @@ -718,6 +718,10 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
>  
>  	/* handling VSYNC */
>  	if (val & MXR_INT_STATUS_VSYNC) {
> +		/* vsync interrupt use different bit for read and clear */
> +		val |= MXR_INT_CLEAR_VSYNC;
> +		val &= ~MXR_INT_STATUS_VSYNC;
> +
>  		/* interlace scan need to check shadow register */
>  		if (ctx->interlace) {
>  			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));
> @@ -743,11 +747,6 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
>  
>  out:
>  	/* clear interrupts */
> -	if (~val & MXR_INT_EN_VSYNC) {
> -		/* vsync interrupt use different bit for read and clear */
> -		val &= ~MXR_INT_EN_VSYNC;
> -		val |= MXR_INT_CLEAR_VSYNC;
> -	}
>  	mixer_reg_write(res, MXR_INT_STATUS, val);
>  
>  	spin_unlock(&res->reg_slock);
> 

Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>

Thanks.
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WARNING: multiple messages have this Message-ID (diff)
From: Joonyoung Shim <jy0922.shim@samsung.com>
To: Andrzej Hajda <a.hajda@samsung.com>, inki.dae@samsung.com
Cc: b.zolnierkie@samsung.com, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: Re: [PATCH RESEND v2 2/6] drm/exynos/mixer: fix interrupt clearing
Date: Thu, 09 Jul 2015 18:05:48 +0900	[thread overview]
Message-ID: <559E396C.4060802@samsung.com> (raw)
In-Reply-To: <1436429273-24144-1-git-send-email-a.hajda@samsung.com>

On 07/09/2015 05:07 PM, Andrzej Hajda wrote:
> The driver used incorrect flags to clear interrupt status.
> The patch fixes it.
> 
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/gpu/drm/exynos/exynos_mixer.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
> index cae98db..25f0aac 100644
> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
> @@ -718,6 +718,10 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
>  
>  	/* handling VSYNC */
>  	if (val & MXR_INT_STATUS_VSYNC) {
> +		/* vsync interrupt use different bit for read and clear */
> +		val |= MXR_INT_CLEAR_VSYNC;
> +		val &= ~MXR_INT_STATUS_VSYNC;
> +
>  		/* interlace scan need to check shadow register */
>  		if (ctx->interlace) {
>  			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));
> @@ -743,11 +747,6 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
>  
>  out:
>  	/* clear interrupts */
> -	if (~val & MXR_INT_EN_VSYNC) {
> -		/* vsync interrupt use different bit for read and clear */
> -		val &= ~MXR_INT_EN_VSYNC;
> -		val |= MXR_INT_CLEAR_VSYNC;
> -	}
>  	mixer_reg_write(res, MXR_INT_STATUS, val);
>  
>  	spin_unlock(&res->reg_slock);
> 

Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>

Thanks.

  reply	other threads:[~2015-07-09  9:05 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-09  6:25 [PATCH RESEND 0/6] drm/exynos: HDMI related fixes Andrzej Hajda
2015-07-09  6:25 ` Andrzej Hajda
2015-07-09  6:25 ` [PATCH RESEND 1/6] drm/exynos/hdmi: fix edid memory leak Andrzej Hajda
2015-07-09  6:25   ` Andrzej Hajda
2015-07-09  6:25 ` [PATCH RESEND 2/6] drm/exynos/mixer: fix interrupt clearing Andrzej Hajda
2015-07-09  6:25   ` Andrzej Hajda
2015-07-09  7:47   ` Joonyoung Shim
2015-07-09  7:47     ` Joonyoung Shim
2015-07-09  8:07     ` [PATCH RESEND v2 " Andrzej Hajda
2015-07-09  8:07       ` Andrzej Hajda
2015-07-09  9:05       ` Joonyoung Shim [this message]
2015-07-09  9:05         ` Joonyoung Shim
2015-07-09  6:25 ` [PATCH RESEND 3/6] drm/exynos/mixer: correct vsync configuration sequence Andrzej Hajda
2015-07-09  6:25   ` Andrzej Hajda
2015-07-09  6:25 ` [PATCH RESEND 4/6] drm/exynos/mixer: always update INT_EN cache Andrzej Hajda
2015-07-09  6:25   ` Andrzej Hajda
2015-07-09  6:25 ` [PATCH RESEND 5/6] drm/exynos/mixer: simplify poweron flag Andrzej Hajda
2015-07-09  6:25   ` Andrzej Hajda
2015-07-09  6:25 ` [PATCH RESEND 6/6] drm/exynos/mixer: replace MXR_INT_EN register cache with flag Andrzej Hajda
2015-07-09  6:25   ` Andrzej Hajda
2015-07-09  7:53 ` [PATCH RESEND 0/6] drm/exynos: HDMI related fixes Joonyoung Shim
2015-07-09  7:53   ` Joonyoung Shim

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