From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes
Date: Thu, 16 Jul 2015 08:46:24 +0200 [thread overview]
Message-ID: <55A75340.80509@denx.de> (raw)
In-Reply-To: <9026814FBF99304F9FA3AC3FB72F3E2F02961958@SAFEX1MAIL4.st.com>
Hi Vikas,
On 15.07.2015 23:14, Vikas MANOCHA wrote:
<snip>
>>> In addition can you please check the patch causing this instability on
>>> socfpga. I don't like to bug you but to close this patchset, this info
>>> & tests mentioned above seems to be required.
>>
>> Okay. I'll try to find some time this week to do some testing here. It seems
>> that the other cadence patchset from you ([v4 00/10] spi:
>> cadence_qspi: sram depth from DT & fix for FIFO width) is not pulled into
>> mainline yet. To make it easier for me, could you perhaps publish a git
>> repository that is based on current mainline. And has the mentioned above
>> patch series included. And all the patches in the latest version that are
>> currently causing these problems on SoCFPGA?
>
> The patchset was in u-boot-spi repository, yesterday pulled by Tom in mainline. I will rebase the patchset in discussion
> (spi: cadence_qspi: optimize & fix indirect rd-writes) on mainline master & send the V2.
>
> Let me know if it is ok.
Okay, I'll try to find some time later this week or next week for some
tests.
Thanks,
Stefan
next prev parent reply other threads:[~2015-07-16 6:46 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-17 2:14 [U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 1/7] spi: cadence_qspi: remove sram polling from flash read Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 2/7] spi: cadence_qspi: read can be independent of fifo width Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 3/7] spi: cadence_qspi: remove sram polling from flash write Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 4/7] spi: cadence_qspi: move trigger base configuration in init Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 5/7] spi: cadence_qspi: fix indirect read/write start address Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 6/7] spi: cadence_qspi: fix base trigger address & transfer " Vikas Manocha
2015-06-17 2:14 ` [U-Boot] [PATCH RESEND 7/7] spi: cadence_qspi: get fifo width from device tree Vikas Manocha
2015-06-18 12:02 ` [U-Boot] [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes Stefan Roese
2015-06-18 18:05 ` Vikas MANOCHA
2015-06-19 6:16 ` Stefan Roese
2015-06-19 21:38 ` Vikas MANOCHA
2015-06-22 8:34 ` Stefan Roese
2015-06-22 23:31 ` Vikas MANOCHA
2015-06-23 14:36 ` Graham Moore
2015-06-23 14:51 ` Vikas MANOCHA
2015-07-02 17:50 ` Vikas MANOCHA
2015-07-06 17:56 ` Graham Moore
2015-07-06 18:19 ` Vikas MANOCHA
2015-07-01 16:24 ` Vikas MANOCHA
2015-07-09 1:29 ` Vikas MANOCHA
2015-07-13 9:00 ` Stefan Roese
2015-07-15 21:14 ` Vikas MANOCHA
2015-07-16 6:46 ` Stefan Roese [this message]
2015-07-23 12:22 ` Stefan Roese
2015-08-11 21:19 ` vikasm
2015-08-12 11:36 ` Stefan Roese
2015-08-12 12:01 ` Jagan Teki
2015-08-12 17:52 ` vikasm
2015-08-12 20:22 ` Marek Vasut
2015-08-13 0:16 ` vikasm
2015-08-13 0:26 ` Marek Vasut
2015-08-13 0:36 ` vikasm
2015-08-13 2:15 ` Marek Vasut
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