From: majun258@huawei.com (majun (F))
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/3] IRQ/Gic-V3: Add mbigen driver to support mbigen interrupt controller
Date: Mon, 27 Jul 2015 10:25:05 +0800 [thread overview]
Message-ID: <55B59681.2090008@huawei.com> (raw)
In-Reply-To: <55A7B3A5.6010008@arm.com>
Hi Marc
? 2015/7/16 21:37, Marc Zyngier ??:
[...]
>>
>> For example, An device with total 5 interrupts connected to Mbigen node.
>> In mbigen chip, the default eventID value for each device starts from 0.
>> So, for these 5 interrupts the default eventID value is from 0 to 4.
>>
>> Because the default eventID is fixed in mbigen chip, to make these 5 interrupt
>> work, the only way is define all these 5 interrupts in dts file.
>
> But the ITS doesn't read these interrupts, and won't let you program the
> translation either.
>
>> When irq initializing, ITS driver will allocat LPI interrupt number for these
>> 5 interrupts, for example : from 8192 to 8196. and the eventID value is from 0 to 4.
>> Now, the allocated eventID value same as the eventID value encoded in mbigen chip,
>> The interrupt can work.
>
> But that's pure luck! What if I decide to change the allocation method
> so that all the devices share a common ITT?
>
> Have you really hardcoded the Linux behaviour in your hardware?
>
>> I know this is not a good method,but for current mbigen chip,it's the only solution.
>
> I'm sorry, I can't call this a solution.
Yes,you are right. This is not a right way to solve the problem.
This problem will be fixed in next version chip.
>
> M.
>
WARNING: multiple messages have this Message-ID (diff)
From: "majun (F)" <majun258@huawei.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Will Deacon <Will.Deacon@arm.com>,
Mark Rutland <Mark.Rutland@arm.com>,
"jason@lakedaemon.net" <jason@lakedaemon.net>,
"lizefan@huawei.com" <lizefan@huawei.com>,
"huxinwei@huawei.com" <huxinwei@huawei.com>,
"dingtianhong@huawei.com" <dingtianhong@huawei.com>,
"zhaojunhua@hisilicon.com" <zhaojunhua@hisilicon.com>,
"liguozhu@hisilicon.com" <liguozhu@hisilicon.com>,
"xuwei5@hisilicon.com" <xuwei5@hisilicon.com>,
"wei.chenwei@hisilicon.com" <wei.chenwei@hisilicon.com>,
"guohanjun@huawei.com" <guohanjun@huawei.com>,
"wuyun.wu@huawei.com" <wuyun.wu@huawei.com>,
"guodong.xu@linaro.org" <guodong.xu@linaro.org>,
"haojian.zhuang@linaro.org" <haojian.zhuang@linaro.org>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>,
"usman.ahmad@linaro.org" <usman.ahmad@linaro.org>
Subject: Re: [PATCH v3 1/3] IRQ/Gic-V3: Add mbigen driver to support mbigen interrupt controller
Date: Mon, 27 Jul 2015 10:25:05 +0800 [thread overview]
Message-ID: <55B59681.2090008@huawei.com> (raw)
In-Reply-To: <55A7B3A5.6010008@arm.com>
Hi Marc
在 2015/7/16 21:37, Marc Zyngier 写道:
[...]
>>
>> For example, An device with total 5 interrupts connected to Mbigen node.
>> In mbigen chip, the default eventID value for each device starts from 0.
>> So, for these 5 interrupts the default eventID value is from 0 to 4.
>>
>> Because the default eventID is fixed in mbigen chip, to make these 5 interrupt
>> work, the only way is define all these 5 interrupts in dts file.
>
> But the ITS doesn't read these interrupts, and won't let you program the
> translation either.
>
>> When irq initializing, ITS driver will allocat LPI interrupt number for these
>> 5 interrupts, for example : from 8192 to 8196. and the eventID value is from 0 to 4.
>> Now, the allocated eventID value same as the eventID value encoded in mbigen chip,
>> The interrupt can work.
>
> But that's pure luck! What if I decide to change the allocation method
> so that all the devices share a common ITT?
>
> Have you really hardcoded the Linux behaviour in your hardware?
>
>> I know this is not a good method,but for current mbigen chip,it's the only solution.
>
> I'm sorry, I can't call this a solution.
Yes,you are right. This is not a right way to solve the problem.
This problem will be fixed in next version chip.
>
> M.
>
next prev parent reply other threads:[~2015-07-27 2:25 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-06 7:09 [PATCH v3 0/3] IRQ/Gic-V3:Support Mbigen interrupt controller Ma Jun
2015-07-06 7:09 ` Ma Jun
2015-07-06 7:09 ` [PATCH v3 1/3] IRQ/Gic-V3: Add mbigen driver to support mbigen " Ma Jun
2015-07-06 7:09 ` Ma Jun
2015-07-06 12:33 ` Thomas Gleixner
2015-07-06 12:33 ` Thomas Gleixner
2015-07-08 4:21 ` majun (F)
2015-07-08 4:21 ` majun (F)
2015-07-08 10:44 ` Thomas Gleixner
2015-07-08 10:44 ` Thomas Gleixner
2015-07-16 8:35 ` majun (F)
2015-07-16 8:35 ` majun (F)
2015-07-08 15:16 ` Marc Zyngier
2015-07-08 15:16 ` Marc Zyngier
2015-07-16 8:35 ` majun (F)
2015-07-16 8:35 ` majun (F)
2015-07-16 8:52 ` Marc Zyngier
2015-07-16 8:52 ` Marc Zyngier
2015-07-16 9:22 ` majun (F)
2015-07-16 9:22 ` majun (F)
2015-07-16 9:30 ` Marc Zyngier
2015-07-16 9:30 ` Marc Zyngier
2015-07-16 12:26 ` majun (F)
2015-07-16 12:26 ` majun (F)
2015-07-16 13:37 ` Marc Zyngier
2015-07-16 13:37 ` Marc Zyngier
2015-07-27 2:25 ` majun (F) [this message]
2015-07-27 2:25 ` majun (F)
2015-07-08 15:30 ` Marc Zyngier
2015-07-08 15:30 ` Marc Zyngier
2015-07-16 8:35 ` majun (F)
2015-07-16 8:35 ` majun (F)
2015-07-06 7:09 ` [PATCH v3 2/3] IRQ/Gic-V3: Change arm-gic-its to support the Mbigen interrupt Ma Jun
2015-07-06 7:09 ` Ma Jun
2015-07-06 7:09 ` [PATCH v3 3/3] dt-binding:Documents the mbigen bindings Ma Jun
2015-07-06 7:09 ` Ma Jun
2015-07-08 13:40 ` Mark Rutland
2015-07-08 13:40 ` Mark Rutland
2015-07-08 14:01 ` Marc Zyngier
2015-07-08 14:01 ` Marc Zyngier
2015-07-16 8:35 ` majun (F)
2015-07-16 8:35 ` majun (F)
2015-07-20 16:38 ` Mark Rutland
2015-07-20 16:38 ` Mark Rutland
2015-07-25 3:03 ` majun (F)
2015-07-25 3:03 ` majun (F)
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