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From: monstr@monstr.eu (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFCv2 1/3] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
Date: Mon, 27 Jul 2015 07:09:28 +0200	[thread overview]
Message-ID: <55B5BD08.60802@monstr.eu> (raw)
In-Reply-To: <1437783682-13632-2-git-send-email-moritz.fischer@ettus.com>

On 07/25/2015 02:21 AM, Moritz Fischer wrote:
> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
> ---
>  Documentation/devicetree/bindings/reset/zynq-reset-pl.txt | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
> 
> diff --git a/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt b/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
> new file mode 100644
> index 0000000..ac4499e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
> @@ -0,0 +1,13 @@
> +Xilinx Zynq PL Reset Manager

here

> +
> +Required properties:
> +- compatible: "xlnx,zynq-reset-pl"

Currently it is not just PL reset controller.

> +- syscon <&slcr>;


missing : and please be more descriptive here.

> +- #reset-cells: 1
> +
> +Example:
> +	rstc: rstc at 240 {
> +		#reset-cells = <1>;
> +		compatible = "xlnx,zynq-reset-pl";

Compatible property should go first.

I am missing that reg property

> +		syscon = <&slcr>;
> +	};
> 

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <monstr@monstr.eu>
To: Moritz Fischer <moritz.fischer@ettus.com>, p.zabel@pengutronix.de
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	linux@arm.linux.org.uk, pawel.moll@arm.com,
	ijc+devicetree@hellion.org.uk, michal.simek@xilinx.com,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, galak@codeaurora.org,
	soren.brinkmann@xilinx.com
Subject: Re: [RFCv2 1/3] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
Date: Mon, 27 Jul 2015 07:09:28 +0200	[thread overview]
Message-ID: <55B5BD08.60802@monstr.eu> (raw)
In-Reply-To: <1437783682-13632-2-git-send-email-moritz.fischer@ettus.com>

[-- Attachment #1: Type: text/plain, Size: 1416 bytes --]

On 07/25/2015 02:21 AM, Moritz Fischer wrote:
> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
> ---
>  Documentation/devicetree/bindings/reset/zynq-reset-pl.txt | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
> 
> diff --git a/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt b/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
> new file mode 100644
> index 0000000..ac4499e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/zynq-reset-pl.txt
> @@ -0,0 +1,13 @@
> +Xilinx Zynq PL Reset Manager

here

> +
> +Required properties:
> +- compatible: "xlnx,zynq-reset-pl"

Currently it is not just PL reset controller.

> +- syscon <&slcr>;


missing : and please be more descriptive here.

> +- #reset-cells: 1
> +
> +Example:
> +	rstc: rstc@240 {
> +		#reset-cells = <1>;
> +		compatible = "xlnx,zynq-reset-pl";

Compatible property should go first.

I am missing that reg property

> +		syscon = <&slcr>;
> +	};
> 

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 198 bytes --]

  reply	other threads:[~2015-07-27  5:09 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-25  0:21 [RFCv2 0/3] Adding support for Zynq Reset Controller Moritz Fischer
2015-07-25  0:21 ` Moritz Fischer
2015-07-25  0:21 ` [RFCv2 1/3] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings Moritz Fischer
2015-07-25  0:21   ` Moritz Fischer
2015-07-27  5:09   ` Michal Simek [this message]
2015-07-27  5:09     ` Michal Simek
2015-07-28  4:55     ` Moritz Fischer
2015-07-28  4:55       ` Moritz Fischer
2015-07-28  4:55       ` Moritz Fischer
2015-07-28  5:41       ` Michal Simek
2015-07-28  5:41         ` Michal Simek
2015-07-28  5:41         ` Michal Simek
2015-07-28  2:58   ` Sören Brinkmann
2015-07-28  2:58     ` Sören Brinkmann
2015-07-28  2:58     ` Sören Brinkmann
2015-07-28  4:52     ` Moritz Fischer
2015-07-28  4:52       ` Moritz Fischer
2015-07-28 22:53       ` Sören Brinkmann
2015-07-28 22:53         ` Sören Brinkmann
2015-07-28 22:53         ` Sören Brinkmann
2015-07-29  6:14         ` Moritz Fischer
2015-07-29  6:14           ` Moritz Fischer
2015-07-29  6:14           ` Moritz Fischer
2015-07-29 17:38           ` Sören Brinkmann
2015-07-29 17:38             ` Sören Brinkmann
2015-07-29 17:38             ` Sören Brinkmann
2015-07-30 14:37             ` Michal Simek
2015-07-30 14:37               ` Michal Simek
2015-07-30 14:37               ` Michal Simek
2015-07-28  8:05   ` Philipp Zabel
2015-07-28  8:05     ` Philipp Zabel
2015-07-28  8:05     ` Philipp Zabel
2015-07-28  8:25     ` Michal Simek
2015-07-28  8:25       ` Michal Simek
2015-07-28  8:25       ` Michal Simek
2015-07-28 13:57       ` Moritz Fischer
2015-07-28 13:57         ` Moritz Fischer
2015-07-28 15:16         ` Philipp Zabel
2015-07-28 15:16           ` Philipp Zabel
2015-07-28 15:16           ` Philipp Zabel
2015-07-25  0:21 ` [RFCv2 2/3] dts: zynq: Add devicetree entry for Xilinx Zynq reset controller Moritz Fischer
2015-07-25  0:21   ` Moritz Fischer
2015-07-27  6:56   ` Michal Simek
2015-07-27  6:56     ` Michal Simek
2015-07-28  5:03     ` Moritz Fischer
2015-07-28  5:03       ` Moritz Fischer
2015-07-28  5:03       ` Moritz Fischer
2015-07-28  5:42       ` Michal Simek
2015-07-28  5:42         ` Michal Simek
2015-07-28  6:59       ` Nicolas Ferre
2015-07-28  6:59         ` Nicolas Ferre
2015-07-28  6:59         ` Nicolas Ferre
2015-07-28  7:44         ` Michal Simek
2015-07-28  7:44           ` Michal Simek
2015-07-28  7:44           ` Michal Simek
2015-07-28 13:54           ` Moritz Fischer
2015-07-28 13:54             ` Moritz Fischer
2015-07-25  0:21 ` [RFCv2 3/3] reset: reset-zynq: Adding support " Moritz Fischer
2015-07-25  0:21   ` Moritz Fischer
2015-07-27  5:14   ` Michal Simek
2015-07-27  5:14     ` Michal Simek
2015-07-27  5:14     ` Michal Simek
2015-07-27  7:12   ` Michal Simek
2015-07-27  7:12     ` Michal Simek
2015-07-27  7:12     ` Michal Simek
2015-07-28  4:59     ` Moritz Fischer
2015-07-28  4:59       ` Moritz Fischer
2015-07-28  4:59       ` Moritz Fischer
2015-07-28  5:43       ` Michal Simek
2015-07-28  5:43         ` Michal Simek
2015-07-28  8:38   ` Philipp Zabel
2015-07-28  8:38     ` Philipp Zabel
2015-07-28  8:38     ` Philipp Zabel
2015-07-28 14:05     ` Moritz Fischer
2015-07-28 14:05       ` Moritz Fischer
2015-07-28 14:05       ` Moritz Fischer
2015-07-28 14:27       ` Sören Brinkmann
2015-07-28 14:27         ` Sören Brinkmann
2015-07-28 14:27         ` Sören Brinkmann

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