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From: Paolo Bonzini <pbonzini@redhat.com>
To: Steve Rutherford <srutherford@google.com>,
	"Zhang, Yang Z" <yang.z.zhang@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"srutherford@intel.com" <srutherford@intel.com>
Subject: Re: [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted
Date: Fri, 31 Jul 2015 09:57:22 +0200	[thread overview]
Message-ID: <55BB2A62.5090302@redhat.com> (raw)
In-Reply-To: <20150731024942.GB31082@google.com>



On 31/07/2015 04:49, Steve Rutherford wrote:
> Oh... Yeah. That's a damn good point, given that the interrupt can be
> injected from another thread while one is in that guest vcpu.
> 
> Easiest time to update the TMR should be on guest entry through
> vcpu_scan_ioapic, as before.
> 
> The best way to go is probably to ditch the new per vcpu EOI exit
> bitmap, and just update/use the TMR. There's no reason to duplicate
> that data in the representation of the apic (I suspect that the
> duplication was inspired by my mistaken notion of the TMR). The
> IOAPIC exit check can use the TMR instead.
> 
> Based upon my reading of the SDM, the only reason that the eoi exit
> bitmaps are not the exact same as the TMR is that it is possible to
> have virtual-interrupt delivery enabled /without/ an apic access page
> (Note: V-ID => EOI exit bitmap enabled).
> 
> Yang, do you happen to know if that is the case?
> 
> [Note: Just looked back at the old code for updating the EOI exit
> bitmaps, which for some reason was configured to trigger EOI exits
> for all IOAPIC interrupts, not just level-triggered IOAPIC
> interrupts. Which is weird, and I believe totally unecessary.]

The RTC interrupt needs to trigger an EOI exit with the in-kernel
IOAPIC, in order to detect coalesced interrupts.  This is necessary to
avoid severe time drift in Windows guest.

Paolo

  reply	other threads:[~2015-07-31  7:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-29 13:37 [PATCH 0/2] KVM: x86: limit interactions between IOAPIC and LAPIC Paolo Bonzini
2015-07-29 13:37 ` [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted Paolo Bonzini
2015-07-30  3:39   ` Steve Rutherford
2015-07-30 23:26   ` Zhang, Yang Z
2015-07-31  2:49     ` Steve Rutherford
2015-07-31  7:57       ` Paolo Bonzini [this message]
2015-08-03  2:44         ` Zhang, Yang Z
2015-07-31  8:01     ` Paolo Bonzini
2015-08-03  2:37       ` Zhang, Yang Z
2015-08-03  8:10         ` Paolo Bonzini
2015-08-03 10:23           ` Zhang, Yang Z
2015-08-03 10:55             ` Paolo Bonzini
2015-08-04  0:46               ` Zhang, Yang Z
2015-08-04  6:59                 ` Paolo Bonzini
2015-08-04  7:21                   ` Zhang, Yang Z
2015-08-13  6:35                   ` Zhang, Yang Z
2015-08-13  7:31                     ` Paolo Bonzini
2015-09-02 22:38                       ` Steve Rutherford
2015-09-03  5:18                         ` Nakajima, Jun
2015-09-03  7:38                           ` Paolo Bonzini
2015-07-29 13:37 ` [PATCH 2/2] KVM: x86: store IOAPIC-handled vectors in each VCPU Paolo Bonzini
2015-07-30  3:55   ` Steve Rutherford
2015-07-30  7:19     ` Paolo Bonzini
2015-07-29 20:00 ` [PATCH 0/2] KVM: x86: limit interactions between IOAPIC and LAPIC Alex Williamson

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