From: Paolo Bonzini <pbonzini@redhat.com>
To: "Zhang, Yang Z" <yang.z.zhang@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"srutherford@intel.com" <srutherford@intel.com>,
"Gudimetla, Giridhar Kumar" <giridhar.kumar.gudimetla@intel.com>
Subject: Re: [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted
Date: Tue, 4 Aug 2015 08:59:56 +0200 [thread overview]
Message-ID: <55C062EC.20006@redhat.com> (raw)
In-Reply-To: <A9667DDFB95DB7438FA9D7D576C3D87E0AD5CD43@SHSMSX104.ccr.corp.intel.com>
On 04/08/2015 02:46, Zhang, Yang Z wrote:
> > It is a problem for split irqchip, where the EOI exit bitmap can be
> > inferred from the IOAPIC routes but the TMR cannot. The hardware
> > behavior on the other hand can be implemented purely within the LAPIC.
>
> So updating the TMR within LAPIC is the only solution to handle it?
It's the simplest and the one that makes most sense. Considering that
TMR is a pretty obscure feature, it's unlikely that it will be
accelerated in the future.
Paolo
next prev parent reply other threads:[~2015-08-04 6:59 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-29 13:37 [PATCH 0/2] KVM: x86: limit interactions between IOAPIC and LAPIC Paolo Bonzini
2015-07-29 13:37 ` [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted Paolo Bonzini
2015-07-30 3:39 ` Steve Rutherford
2015-07-30 23:26 ` Zhang, Yang Z
2015-07-31 2:49 ` Steve Rutherford
2015-07-31 7:57 ` Paolo Bonzini
2015-08-03 2:44 ` Zhang, Yang Z
2015-07-31 8:01 ` Paolo Bonzini
2015-08-03 2:37 ` Zhang, Yang Z
2015-08-03 8:10 ` Paolo Bonzini
2015-08-03 10:23 ` Zhang, Yang Z
2015-08-03 10:55 ` Paolo Bonzini
2015-08-04 0:46 ` Zhang, Yang Z
2015-08-04 6:59 ` Paolo Bonzini [this message]
2015-08-04 7:21 ` Zhang, Yang Z
2015-08-13 6:35 ` Zhang, Yang Z
2015-08-13 7:31 ` Paolo Bonzini
2015-09-02 22:38 ` Steve Rutherford
2015-09-03 5:18 ` Nakajima, Jun
2015-09-03 7:38 ` Paolo Bonzini
2015-07-29 13:37 ` [PATCH 2/2] KVM: x86: store IOAPIC-handled vectors in each VCPU Paolo Bonzini
2015-07-30 3:55 ` Steve Rutherford
2015-07-30 7:19 ` Paolo Bonzini
2015-07-29 20:00 ` [PATCH 0/2] KVM: x86: limit interactions between IOAPIC and LAPIC Alex Williamson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=55C062EC.20006@redhat.com \
--to=pbonzini@redhat.com \
--cc=alex.williamson@redhat.com \
--cc=giridhar.kumar.gudimetla@intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=srutherford@intel.com \
--cc=yang.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.