[Qemu-devel] [PATCH 0/3] tcg: fixes for MIPS and S390 hosts

[Qemu-devel] [PATCH 0/3] tcg: fixes for MIPS and S390 hosts

[Aurelien Jarno]

These are small fixes for MIPS and S390 hosts, found by testing various
guests on these hosts.

Aurelien Jarno (3):
  tcg/mips: fix TLB loading for BE host with 32-bit guests
  tcg/mips: Mask TCGMemOp appropriately for indexing
  tcg/s390x: Mask TCGMemOp appropriately for indexing

 tcg/mips/tcg-target.c | 8 +++++---
 tcg/s390/tcg-target.c | 4 ++--
 2 files changed, 7 insertions(+), 5 deletions(-)

-- 
2.1.4

[Qemu-devel] [PATCH 1/3] tcg/mips: fix TLB loading for BE host with 32-bit guests

[Aurelien Jarno]

For 32-bit guest, we load a 32-bit address from the TLB, so there is no
need to compensate for the low or high part. This fixes 32-bit guests on
big-endian hosts.

Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 tcg/mips/tcg-target.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 6680299..8dce19c 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -963,9 +963,11 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
     }
 
     /* Load the tlb comparator.  */
-    tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);
     if (TARGET_LONG_BITS == 64) {
+        tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);
         tcg_out_opc_imm(s, OPC_LW, base, TCG_REG_A0, cmp_off + HI_OFF);
+    } else {
+        tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off);
     }
 
     /* Mask the page bits, keeping the alignment bits to compare against.
-- 
2.1.4

[Qemu-devel] [PATCH 2/3] tcg/mips: Mask TCGMemOp appropriately for indexing

[Aurelien Jarno]

Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG MIPS backend.

Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 tcg/mips/tcg-target.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 8dce19c..064db46 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -1105,7 +1105,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
 static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
                                    TCGReg base, TCGMemOp opc)
 {
-    switch (opc) {
+    switch (opc & (MO_SSIZE | MO_BSWAP)) {
     case MO_UB:
         tcg_out_opc_imm(s, OPC_LBU, datalo, base, 0);
         break;
@@ -1195,7 +1195,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
 static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
                                    TCGReg base, TCGMemOp opc)
 {
-    switch (opc) {
+    switch (opc & (MO_SIZE | MO_BSWAP)) {
     case MO_8:
         tcg_out_opc_imm(s, OPC_SB, datalo, base, 0);
         break;
-- 
2.1.4

[Qemu-devel] [PATCH 3/3] tcg/s390x: Mask TCGMemOp appropriately for indexing

[Aurelien Jarno]

Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG S390 backend.

Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 tcg/s390/tcg-target.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 921991e..aa718ec 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -1390,7 +1390,7 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *dest)
 static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
                                    TCGReg base, TCGReg index, int disp)
 {
-    switch (opc) {
+    switch (opc & (MO_SSIZE | MO_BSWAP)) {
     case MO_UB:
         tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
         break;
@@ -1449,7 +1449,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
 static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
                                    TCGReg base, TCGReg index, int disp)
 {
-    switch (opc) {
+    switch (opc & (MO_SIZE | MO_BSWAP)) {
     case MO_UB:
         if (disp >= 0 && disp < 0x1000) {
             tcg_out_insn(s, RX, STC, data, base, index, disp);
-- 
2.1.4

Re: [Qemu-devel] [PATCH 0/3] tcg: fixes for MIPS and S390 hosts

[Richard Henderson]

On 07/30/2015 03:03 PM, Aurelien Jarno wrote:
> These are small fixes for MIPS and S390 hosts, found by testing various
> guests on these hosts.
>
> Aurelien Jarno (3):
>    tcg/mips: fix TLB loading for BE host with 32-bit guests
>    tcg/mips: Mask TCGMemOp appropriately for indexing
>    tcg/s390x: Mask TCGMemOp appropriately for indexing
>
>   tcg/mips/tcg-target.c | 8 +++++---
>   tcg/s390/tcg-target.c | 4 ++--
>   2 files changed, 7 insertions(+), 5 deletions(-)
>

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~