From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Antoine Tenart <antoine.tenart@free-electrons.com>,
mturquette@baylibre.com, sboyd@codeaurora.org
Cc: zmxu@marvell.com, jszhang@marvell.com,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] clk: berlin: add cpuclk
Date: Mon, 10 Aug 2015 21:55:16 +0200 [thread overview]
Message-ID: <55C901A4.4050605@gmail.com> (raw)
In-Reply-To: <1438259752-16320-2-git-send-email-antoine.tenart@free-electrons.com>
On 30.07.2015 14:35, Antoine Tenart wrote:
> Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
> fixed to 1.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> ---
> drivers/clk/berlin/bg2q.c | 14 +++++++-------
> include/dt-bindings/clock/berlin2q.h | 3 ++-
> 2 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> index 221f40c2b850..72d2f3500db8 100644
> --- a/drivers/clk/berlin/bg2q.c
> +++ b/drivers/clk/berlin/bg2q.c
> @@ -45,7 +45,7 @@
> #define REG_SDIO0XIN_CLKCTL 0x0158
> #define REG_SDIO1XIN_CLKCTL 0x015c
>
> -#define MAX_CLKS 27
> +#define MAX_CLKS 28
Following Stephen's suggesting, how about moving this to the
dt-bindings include?
> static struct clk *clks[MAX_CLKS];
> static struct clk_onecell_data clk_data;
> static DEFINE_SPINLOCK(lock);
> @@ -356,13 +356,13 @@ static void __init berlin2q_clock_setup(struct device_node *np)
> gd->bit_idx, 0, &lock);
> }
>
> - /*
> - * twdclk is derived from cpu/3
> - * TODO: use cpupll until cpuclk is not available
> - */
> + /* cpuclk divider is fixed to 1 */
> + clks[CLKID_CPU] =
> + clk_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
> + 0, 1, 1);
> + /* twdclk is derived from cpu/3 */
> clks[CLKID_TWD] =
> - clk_register_fixed_factor(NULL, "twd", clk_names[CPUPLL],
> - 0, 1, 3);
> + clk_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
>
> /* check for errors on leaf clocks */
> for (n = 0; n < MAX_CLKS; n++) {
> diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h
> index 287fc3b4afb2..a80c3272794d 100644
> --- a/include/dt-bindings/clock/berlin2q.h
> +++ b/include/dt-bindings/clock/berlin2q.h
> @@ -28,4 +28,5 @@
> #define CLKID_NFC 23
> #define CLKID_SMEMC 24
> #define CLKID_PCIE 25
> -#define CLKID_TWD 26
> +#define CLKID_CPU 26
> +#define CLKID_TWD 27
Is there any good reason to brake existing dts[i] by moving TWD to 27
instead of adding CPU as 27?
Sebastian
WARNING: multiple messages have this Message-ID (diff)
From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] clk: berlin: add cpuclk
Date: Mon, 10 Aug 2015 21:55:16 +0200 [thread overview]
Message-ID: <55C901A4.4050605@gmail.com> (raw)
In-Reply-To: <1438259752-16320-2-git-send-email-antoine.tenart@free-electrons.com>
On 30.07.2015 14:35, Antoine Tenart wrote:
> Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
> fixed to 1.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> ---
> drivers/clk/berlin/bg2q.c | 14 +++++++-------
> include/dt-bindings/clock/berlin2q.h | 3 ++-
> 2 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
> index 221f40c2b850..72d2f3500db8 100644
> --- a/drivers/clk/berlin/bg2q.c
> +++ b/drivers/clk/berlin/bg2q.c
> @@ -45,7 +45,7 @@
> #define REG_SDIO0XIN_CLKCTL 0x0158
> #define REG_SDIO1XIN_CLKCTL 0x015c
>
> -#define MAX_CLKS 27
> +#define MAX_CLKS 28
Following Stephen's suggesting, how about moving this to the
dt-bindings include?
> static struct clk *clks[MAX_CLKS];
> static struct clk_onecell_data clk_data;
> static DEFINE_SPINLOCK(lock);
> @@ -356,13 +356,13 @@ static void __init berlin2q_clock_setup(struct device_node *np)
> gd->bit_idx, 0, &lock);
> }
>
> - /*
> - * twdclk is derived from cpu/3
> - * TODO: use cpupll until cpuclk is not available
> - */
> + /* cpuclk divider is fixed to 1 */
> + clks[CLKID_CPU] =
> + clk_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
> + 0, 1, 1);
> + /* twdclk is derived from cpu/3 */
> clks[CLKID_TWD] =
> - clk_register_fixed_factor(NULL, "twd", clk_names[CPUPLL],
> - 0, 1, 3);
> + clk_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
>
> /* check for errors on leaf clocks */
> for (n = 0; n < MAX_CLKS; n++) {
> diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h
> index 287fc3b4afb2..a80c3272794d 100644
> --- a/include/dt-bindings/clock/berlin2q.h
> +++ b/include/dt-bindings/clock/berlin2q.h
> @@ -28,4 +28,5 @@
> #define CLKID_NFC 23
> #define CLKID_SMEMC 24
> #define CLKID_PCIE 25
> -#define CLKID_TWD 26
> +#define CLKID_CPU 26
> +#define CLKID_TWD 27
Is there any good reason to brake existing dts[i] by moving TWD to 27
instead of adding CPU as 27?
Sebastian
next prev parent reply other threads:[~2015-08-10 19:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-30 12:35 [PATCH 0/3] ARM: berlin: add cpufreq support for the BG2Q Antoine Tenart
2015-07-30 12:35 ` Antoine Tenart
2015-07-30 12:35 ` [PATCH 1/3] clk: berlin: add cpuclk Antoine Tenart
2015-07-30 12:35 ` Antoine Tenart
2015-08-07 23:59 ` Stephen Boyd
2015-08-07 23:59 ` Stephen Boyd
2015-08-10 19:55 ` Sebastian Hesselbarth [this message]
2015-08-10 19:55 ` Sebastian Hesselbarth
2015-07-30 12:35 ` [PATCH 2/3] ARM: berlin: register cpufreq-dt for the BG2Q Antoine Tenart
2015-07-30 12:35 ` Antoine Tenart
2015-07-31 6:16 ` Jisheng Zhang
2015-07-31 6:16 ` Jisheng Zhang
2015-07-31 6:16 ` Jisheng Zhang
2015-08-10 20:22 ` Sebastian Hesselbarth
2015-08-10 20:22 ` Sebastian Hesselbarth
2015-08-11 2:44 ` Jisheng Zhang
2015-08-11 2:44 ` Jisheng Zhang
2015-08-11 2:44 ` Jisheng Zhang
2015-07-30 12:35 ` [PATCH 3/3] ARM: berlin: dts: add the cpufreq-dt bindings on " Antoine Tenart
2015-07-30 12:35 ` Antoine Tenart
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