From: Suzuki.Poulose@arm.com (Suzuki K. Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 01/10] arm64: feature registers: Documentation
Date: Tue, 11 Aug 2015 16:37:46 +0100 [thread overview]
Message-ID: <55CA16CA.8060609@arm.com> (raw)
In-Reply-To: <20150811142301.GE23307@e104818-lin.cambridge.arm.com>
On 11/08/15 15:23, Catalin Marinas wrote:
> On Mon, Aug 10, 2015 at 07:48:48PM +0200, Ard Biesheuvel wrote:
>>> On 10/08/15 17:06, Catalin Marinas wrote:
>>>> And to debunk some of the counter arguments:
>>>>
>>>> a) Running out of HWCAP bits - I really doubt this, we can always
>>>> introduce 64 more via a new elf_hwcapX
>>
>> Note that ELF_HWCAP is also wired into ifunc resolution of GNU
>> indirect functions, which looks like a useful feature although it
>> isn't used that widely yet.
>
> I forgot to mention, we also need an HWCAP_CPUID with these patches when
> we expose the MRS interface. The ifunc resolver could use MRS when
> available. But I would still keep adding HWCAP bits for new features,
> even if we risk running out of the 64-bit we have now.
>
Sure, I will add the HWCAP_CPUID in the next version of the series.
Thanks
Suzuki
WARNING: multiple messages have this Message-ID (diff)
From: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Mark Rutland <Mark.Rutland@arm.com>,
"aph@redhat.com" <aph@redhat.com>,
Will Deacon <Will.Deacon@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"edward.nevill@linaro.org" <edward.nevill@linaro.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 01/10] arm64: feature registers: Documentation
Date: Tue, 11 Aug 2015 16:37:46 +0100 [thread overview]
Message-ID: <55CA16CA.8060609@arm.com> (raw)
In-Reply-To: <20150811142301.GE23307@e104818-lin.cambridge.arm.com>
On 11/08/15 15:23, Catalin Marinas wrote:
> On Mon, Aug 10, 2015 at 07:48:48PM +0200, Ard Biesheuvel wrote:
>>> On 10/08/15 17:06, Catalin Marinas wrote:
>>>> And to debunk some of the counter arguments:
>>>>
>>>> a) Running out of HWCAP bits - I really doubt this, we can always
>>>> introduce 64 more via a new elf_hwcapX
>>
>> Note that ELF_HWCAP is also wired into ifunc resolution of GNU
>> indirect functions, which looks like a useful feature although it
>> isn't used that widely yet.
>
> I forgot to mention, we also need an HWCAP_CPUID with these patches when
> we expose the MRS interface. The ifunc resolver could use MRS when
> available. But I would still keep adding HWCAP bits for new features,
> even if we risk running out of the 64-bit we have now.
>
Sure, I will add the HWCAP_CPUID in the next version of the series.
Thanks
Suzuki
next prev parent reply other threads:[~2015-08-11 15:37 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-24 9:43 [RFC PATCH 00/10] arm64: Expose CPU feature registers Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 01/10] arm64: feature registers: Documentation Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-08-10 16:06 ` Catalin Marinas
2015-08-10 16:06 ` Catalin Marinas
2015-08-10 17:36 ` Suzuki K. Poulose
2015-08-10 17:36 ` Suzuki K. Poulose
2015-08-10 17:48 ` Ard Biesheuvel
2015-08-10 17:48 ` Ard Biesheuvel
2015-08-11 14:23 ` Catalin Marinas
2015-08-11 14:23 ` Catalin Marinas
2015-08-11 15:37 ` Suzuki K. Poulose [this message]
2015-08-11 15:37 ` Suzuki K. Poulose
2015-09-10 15:55 ` Dave Martin
2015-09-10 15:55 ` Dave Martin
2015-08-10 18:19 ` Andrew Haley
2015-08-10 18:19 ` Andrew Haley
2015-08-11 8:41 ` Suzuki K. Poulose
2015-08-11 8:41 ` Suzuki K. Poulose
2015-08-11 8:58 ` Andrew Haley
2015-08-11 8:58 ` Andrew Haley
2015-08-11 14:46 ` Catalin Marinas
2015-08-11 14:46 ` Catalin Marinas
2015-08-11 15:18 ` Suzuki K. Poulose
2015-08-11 15:18 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 02/10] arm64: Make the CPU information more clear Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 03/10] arm64: Delay ELF HWCAP initialisation until all CPUs are up Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 04/10] arm64: Consolidate cpuinfo handling Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 05/10] arm64: Keep track of CPU feature registers Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-08-05 14:58 ` Suzuki K. Poulose
2015-08-05 14:58 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 06/10] arm64: Add helper to decode register from instruction Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 07/10] arm64: Expose feature registers by emulating MRS Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 08/10] arm64: Emulate ID registers Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 09/10] arm64: Read system wide CPUID value Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` [RFC PATCH 10/10] arm64: Use system-wide safe value of CPU feature register Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
2015-07-24 9:43 ` sample: arm64 cpu feature: Test program Suzuki K. Poulose
2015-07-24 9:43 ` Suzuki K. Poulose
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