From: James Morse <james.morse@arm.com>
To: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Jingoo Han <jg1.han@samsung.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Arnd Bergmann <arnd@arndb.de>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"thomas.petazzoni@free-electrons.com"
<thomas.petazzoni@free-electrons.com>,
"gabriele.paoloni@huawei.com" <gabriele.paoloni@huawei.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Liviu Dudau <Liviu.Dudau@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
"robh@kernel.org" <robh@kernel.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"yuanzhichang@hisilicon.com" <yuanzhichang@hisilicon.com>,
"zhudacai@hisilicon.com" <zhudacai@hisilicon.com>,
"zhangjukuo@huawei.com" <zhangjukuo@huawei.com>,
"qiuzhenfa@hisilicon.com" <qiuzhenfa@hisilicon.com>,
"liudongdong3@huawei.com" <liudongdong3@huawei.com>,
"qiujiang@huawei.com" <qiujiang@huawei.com>,
"kangfenglong@huawei.com" <kangfenglong@huawei.com>,
"xuwei5@hisilicon.com" <xuwei5@hisilicon.com>,
"liguozhu@hisilicon.com" <liguozhu@hisilicon.com>,
Jingoo Han <jingoohan1@gmail.com>
Subject: Re: [PATCH v6 3/6] PCI: designware: Add ARM64 support
Date: Fri, 14 Aug 2015 15:48:32 +0100 [thread overview]
Message-ID: <55CDFFC0.40604@arm.com> (raw)
In-Reply-To: <55C44B18.4010103@hisilicon.com>
On 07/08/15 07:07, Zhou Wang wrote:
> On 2015/8/6 16:09, Zhou Wang wrote:
>> This patch tries to unify ARM32 and ARM64 PCIe in designware driver. Delete
>> function dw_pcie_setup, dw_pcie_scan_bus, dw_pcie_map_irq and struct hw_pci,
>> move related operations to dw_pcie_host_init.
>>
>> In past, we use:
>> pci_common_init_dev
>> -> pcibios_init_hw
>> -> hw->scan (dw_pcie_scan_bus)
>> to pass 0 to root_bus_nr in struct pcie_port. This patch set pp->root_bus_nr = 0
>> in each PCIe host driver which is based on pcie-designware.
>>
>> This patch also try to use of_pci_get_host_bridge_resources for ARM32 and ARM64
>> according to the suggestion for Gabriele[1]
>>
>> Finally this patch reverts commit f4c55c5a3f7f "PCI: designware: Program ATU
>> with untranslated address" based on 1/6 in this series. we delete *_mod_base in
>> pcie-designware. This was discussed in [2]
>>
>> I have compiled the driver with multi_v7_defconfig. However, I don't have
>> ARM32 PCIe related board to do test. It will be appreciated if someone could
>> help to test it.
I've tested this whole series on an ARM32 PCIe board:'Freescale i.MX6 Quad
SABRE Lite Board' with an Intel wireless card on v4.2-rc6.
I can rescan the bus, load firmware, list nearby APs, and even get MSIs
coming from the card.
Tested-By: James Morse <james.morse@arm.com>
Thanks,
James
WARNING: multiple messages have this Message-ID (diff)
From: james.morse@arm.com (James Morse)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 3/6] PCI: designware: Add ARM64 support
Date: Fri, 14 Aug 2015 15:48:32 +0100 [thread overview]
Message-ID: <55CDFFC0.40604@arm.com> (raw)
In-Reply-To: <55C44B18.4010103@hisilicon.com>
On 07/08/15 07:07, Zhou Wang wrote:
> On 2015/8/6 16:09, Zhou Wang wrote:
>> This patch tries to unify ARM32 and ARM64 PCIe in designware driver. Delete
>> function dw_pcie_setup, dw_pcie_scan_bus, dw_pcie_map_irq and struct hw_pci,
>> move related operations to dw_pcie_host_init.
>>
>> In past, we use:
>> pci_common_init_dev
>> -> pcibios_init_hw
>> -> hw->scan (dw_pcie_scan_bus)
>> to pass 0 to root_bus_nr in struct pcie_port. This patch set pp->root_bus_nr = 0
>> in each PCIe host driver which is based on pcie-designware.
>>
>> This patch also try to use of_pci_get_host_bridge_resources for ARM32 and ARM64
>> according to the suggestion for Gabriele[1]
>>
>> Finally this patch reverts commit f4c55c5a3f7f "PCI: designware: Program ATU
>> with untranslated address" based on 1/6 in this series. we delete *_mod_base in
>> pcie-designware. This was discussed in [2]
>>
>> I have compiled the driver with multi_v7_defconfig. However, I don't have
>> ARM32 PCIe related board to do test. It will be appreciated if someone could
>> help to test it.
I've tested this whole series on an ARM32 PCIe board:'Freescale i.MX6 Quad
SABRE Lite Board' with an Intel wireless card on v4.2-rc6.
I can rescan the bus, load firmware, list nearby APs, and even get MSIs
coming from the card.
Tested-By: James Morse <james.morse@arm.com>
Thanks,
James
WARNING: multiple messages have this Message-ID (diff)
From: James Morse <james.morse@arm.com>
To: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Jingoo Han <jg1.han@samsung.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Arnd Bergmann <arnd@arndb.de>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"thomas.petazzoni@free-electrons.com"
<thomas.petazzoni@free-electrons.com>,
"gabriele.paoloni@huawei.com" <gabriele.paoloni@huawei.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Liviu Dudau <Liviu.Dudau@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
"robh@kernel.org" <robh@kernel.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"yuanzhichang@hisilicon.com" <yuanzhichang@hisilicon.com>,
"zhudacai@hisilicon.com" <zhudacai@hisilicon.com>,
"zhangjukuo@huawei.com" <zhangjukuo@huawei.com>,
"qiuzhenfa@hisilicon.com" <qiuz>
Subject: Re: [PATCH v6 3/6] PCI: designware: Add ARM64 support
Date: Fri, 14 Aug 2015 15:48:32 +0100 [thread overview]
Message-ID: <55CDFFC0.40604@arm.com> (raw)
In-Reply-To: <55C44B18.4010103@hisilicon.com>
On 07/08/15 07:07, Zhou Wang wrote:
> On 2015/8/6 16:09, Zhou Wang wrote:
>> This patch tries to unify ARM32 and ARM64 PCIe in designware driver. Delete
>> function dw_pcie_setup, dw_pcie_scan_bus, dw_pcie_map_irq and struct hw_pci,
>> move related operations to dw_pcie_host_init.
>>
>> In past, we use:
>> pci_common_init_dev
>> -> pcibios_init_hw
>> -> hw->scan (dw_pcie_scan_bus)
>> to pass 0 to root_bus_nr in struct pcie_port. This patch set pp->root_bus_nr = 0
>> in each PCIe host driver which is based on pcie-designware.
>>
>> This patch also try to use of_pci_get_host_bridge_resources for ARM32 and ARM64
>> according to the suggestion for Gabriele[1]
>>
>> Finally this patch reverts commit f4c55c5a3f7f "PCI: designware: Program ATU
>> with untranslated address" based on 1/6 in this series. we delete *_mod_base in
>> pcie-designware. This was discussed in [2]
>>
>> I have compiled the driver with multi_v7_defconfig. However, I don't have
>> ARM32 PCIe related board to do test. It will be appreciated if someone could
>> help to test it.
I've tested this whole series on an ARM32 PCIe board:'Freescale i.MX6 Quad
SABRE Lite Board' with an Intel wireless card on v4.2-rc6.
I can rescan the bus, load firmware, list nearby APs, and even get MSIs
coming from the card.
Tested-By: James Morse <james.morse@arm.com>
Thanks,
James
next prev parent reply other threads:[~2015-08-14 14:48 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-06 8:09 [PATCH v6 0/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` [PATCH v6 1/6] PCI: designware: move calculation of bus addresses to DRA7xx Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-07 6:03 ` Zhou Wang
2015-08-07 6:03 ` Zhou Wang
2015-08-07 6:03 ` Zhou Wang
2015-08-07 6:04 ` Zhou Wang
2015-08-07 6:04 ` Zhou Wang
2015-08-07 6:04 ` Zhou Wang
2015-08-12 15:40 ` Pratyush Anand
2015-08-12 15:40 ` Pratyush Anand
2015-08-12 15:40 ` Pratyush Anand
2015-08-06 8:09 ` [PATCH v6 2/6] ARM/PCI: remove align_resource in pci_sys_data Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-07 6:06 ` Zhou Wang
2015-08-07 6:06 ` Zhou Wang
2015-08-07 6:06 ` Zhou Wang
2015-08-12 15:42 ` Pratyush Anand
2015-08-12 15:42 ` Pratyush Anand
2015-08-12 15:42 ` Pratyush Anand
2015-08-06 8:09 ` [PATCH v6 3/6] PCI: designware: Add ARM64 support Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-07 6:07 ` Zhou Wang
2015-08-07 6:07 ` Zhou Wang
2015-08-07 6:07 ` Zhou Wang
2015-08-14 14:48 ` James Morse [this message]
2015-08-14 14:48 ` James Morse
2015-08-14 14:48 ` James Morse
2015-08-14 14:55 ` Gabriele Paoloni
2015-08-14 14:55 ` Gabriele Paoloni
2015-08-14 14:55 ` Gabriele Paoloni
2015-08-17 4:50 ` Zhou Wang
2015-08-17 4:50 ` Zhou Wang
2015-08-17 4:50 ` Zhou Wang
2015-08-06 8:09 ` [PATCH v6 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-07 6:08 ` Zhou Wang
2015-08-07 6:08 ` Zhou Wang
2015-08-07 6:08 ` Zhou Wang
2015-08-06 8:09 ` [PATCH v6 5/6] Documentation: DT: Add HiSilicon PCIe host binding Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-07 6:08 ` Zhou Wang
2015-08-07 6:08 ` Zhou Wang
2015-08-07 6:08 ` Zhou Wang
2015-08-06 8:09 ` [PATCH v6 6/6] MAINTAINERS: Add pcie-hisi maintainer Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-06 8:09 ` Zhou Wang
2015-08-07 6:09 ` Zhou Wang
2015-08-07 6:09 ` Zhou Wang
2015-08-07 6:09 ` Zhou Wang
2015-08-07 6:01 ` [PATCH v6 0/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-08-07 6:01 ` Zhou Wang
2015-08-07 6:01 ` Zhou Wang
2015-08-11 7:39 ` Gabriele Paoloni
2015-08-11 7:39 ` Gabriele Paoloni
2015-08-11 7:39 ` Gabriele Paoloni
2015-08-07 6:02 ` Zhou Wang
2015-08-07 6:02 ` Zhou Wang
2015-08-07 6:02 ` Zhou Wang
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