From: Zhi Wang <zhi.a.wang@intel.com>
To: "Xie, William" <william.xie@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: Water mark update need to wait for next VSYNC?
Date: Sun, 06 Sep 2015 19:30:26 +0800 [thread overview]
Message-ID: <55EC23D2.4000004@intel.com> (raw)
In-Reply-To: <D95B070D38087A47ADCD55E64CDD74BD2B35772A@SHSMSX101.ccr.corp.intel.com>
Hi William:
There is a kind of display register marked as double-buffered. It
means that HW will *not* latch the value in the register all the time.
HW will only latch the value on the start of the vertical blank, or the
time when pipe/plane are enabling.
So you will see some code pieces are waiting for frame count change
after updating a register.
For WM registers, it should be double-buffered with armed attribute I
believe. It means after writing the WM registers, you have to write
another register to let the WM register become into "armed" state. After
the register is "armed", HW will latch the value on the time point
mentioned above.
So you should see in some code pieces, they write another register after
updating the target register, then waits for the frame count change.
i.e update WM register -> update PLANE SURF register -> wait for frame
count change
于 09/03/15 06:42, Xie, William 写道:
> Hi all,
>
> Can anyone educate me if water mark update need to wait for next VSYNC?
>
> In other words, if we flip a frame to overlay for the first time,
>
> it will be showed in the next VBlank as water mark update needs to wait
> for that?
>
> Is this true or a bug?
>
> Thanks
>
> William
>
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-09-06 11:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-02 22:42 Water mark update need to wait for next VSYNC? Xie, William
2015-09-06 11:30 ` Zhi Wang [this message]
2015-09-06 11:50 ` Ville Syrjälä
2015-09-06 11:54 ` Zhi Wang
2015-09-08 15:19 ` Xie, William
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=55EC23D2.4000004@intel.com \
--to=zhi.a.wang@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=william.xie@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.