Re: [Qemu-devel] [PATCH v2 05/11] target-arm: Implement ccmp branchless

[Richard Henderson <rth@twiddle.net>]

On 09/07/2015 10:31 AM, Peter Maydell wrote:
>> -    if (cond < 0x0e) { /* continue */
>> -        gen_set_label(label_continue);
>> +    /* If COND was false, force the flags to #nzcv.
>> +       Note that T1 = (COND ? 0 : -1), T2 = (COND ? -1 : 0).  */
>> +    tcg_t1 = tcg_temp_new_i32();
>> +    tcg_t2 = tcg_temp_new_i32();
>> +    tcg_gen_neg_i32(tcg_t1, tcg_t0);
>> +    tcg_gen_subi_i32(tcg_t2, tcg_t0, 1);
>
> t2 is ~t1, right? Do we get better/worse code if we use
> tcg_gen_andc_i32(..., tcg_t1) rather than creating t2 and
> using gen_and_i32 ?
>
>> +
>> +    if (nzcv & 8) { /* N */
>> +        tcg_gen_or_i32(cpu_NF, cpu_NF, tcg_t1);
>> +    } else {
>> +        tcg_gen_and_i32(cpu_NF, cpu_NF, tcg_t2);
>> +    }
>> +    if (nzcv & 4) { /* Z */
>> +        tcg_gen_and_i32(cpu_ZF, cpu_ZF, tcg_t2);
>> +    } else {
>> +        tcg_gen_or_i32(cpu_ZF, cpu_ZF, tcg_t0);
>> +    }
>> +    if (nzcv & 2) { /* C */
>> +        tcg_gen_or_i32(cpu_CF, cpu_CF, tcg_t0);
>> +    } else {
>> +        tcg_gen_and_i32(cpu_CF, cpu_CF, tcg_t2);
>> +    }
>> +    if (nzcv & 1) { /* V */
>> +        tcg_gen_or_i32(cpu_VF, cpu_VF, tcg_t1);
>> +    } else {
>> +        tcg_gen_and_i32(cpu_VF, cpu_VF, tcg_t2);

If the host supports andc, it's probably better to use only the one temp.  But 
otherwise we may save 4 not insns.  Is it worth complicating the code for that?


r~