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* [PATCH] Docs: dt: add #msi-cells to GICv3 ITS binding
@ 2015-09-07  9:49 ` Mark Rutland
  0 siblings, 0 replies; 4+ messages in thread
From: Mark Rutland @ 2015-09-07  9:49 UTC (permalink / raw)
  To: linux-arm-kernel

The GICv3 ITS uses sideband master identification data (known as a
DeviceID) to identify which master wrote to a doorbell, and this data is
used to determine how to react in response to the write.

Commit 1e6db000482fa65a ("irqchip/gicv3-its: Add platform MSI support")
added support per this binding, but failed to update the documentation.
This patch fixes the documentation.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
---
 Documentation/devicetree/bindings/arm/gic-v3.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/gic-v3.txt b/Documentation/devicetree/bindings/arm/gic-v3.txt
index ddfade4..7803e77 100644
--- a/Documentation/devicetree/bindings/arm/gic-v3.txt
+++ b/Documentation/devicetree/bindings/arm/gic-v3.txt
@@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
 These nodes must have the following properties:
 - compatible : Should at least contain  "arm,gic-v3-its".
 - msi-controller : Boolean property. Identifies the node as an MSI controller
+- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
+  which will generate the MSI.
 - reg: Specifies the base physical address and size of the ITS
   registers.
 
@@ -83,6 +85,7 @@ Examples:
 		gic-its at 2c200000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0x2c200000 0 0x200000>;
 		};
 	};
@@ -107,12 +110,14 @@ Examples:
 		gic-its at 2c200000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0x2c200000 0 0x200000>;
 		};
 
 		gic-its at 2c400000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0x2c400000 0 0x200000>;
 		};
 	};
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH] Docs: dt: add #msi-cells to GICv3 ITS binding
@ 2015-09-07  9:49 ` Mark Rutland
  0 siblings, 0 replies; 4+ messages in thread
From: Mark Rutland @ 2015-09-07  9:49 UTC (permalink / raw)
  To: devicetree-u79uwXL29TY76Z2rM5mHXA
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	marc.zyngier-5wv7dgnIgG8, Mark Rutland, Rob Herring

The GICv3 ITS uses sideband master identification data (known as a
DeviceID) to identify which master wrote to a doorbell, and this data is
used to determine how to react in response to the write.

Commit 1e6db000482fa65a ("irqchip/gicv3-its: Add platform MSI support")
added support per this binding, but failed to update the documentation.
This patch fixes the documentation.

Signed-off-by: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Acked-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 Documentation/devicetree/bindings/arm/gic-v3.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/gic-v3.txt b/Documentation/devicetree/bindings/arm/gic-v3.txt
index ddfade4..7803e77 100644
--- a/Documentation/devicetree/bindings/arm/gic-v3.txt
+++ b/Documentation/devicetree/bindings/arm/gic-v3.txt
@@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
 These nodes must have the following properties:
 - compatible : Should at least contain  "arm,gic-v3-its".
 - msi-controller : Boolean property. Identifies the node as an MSI controller
+- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
+  which will generate the MSI.
 - reg: Specifies the base physical address and size of the ITS
   registers.
 
@@ -83,6 +85,7 @@ Examples:
 		gic-its@2c200000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0x2c200000 0 0x200000>;
 		};
 	};
@@ -107,12 +110,14 @@ Examples:
 		gic-its@2c200000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0x2c200000 0 0x200000>;
 		};
 
 		gic-its@2c400000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0x2c400000 0 0x200000>;
 		};
 	};
-- 
1.9.1

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^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH] Docs: dt: add #msi-cells to GICv3 ITS binding
@ 2015-09-17 19:39   ` Rob Herring
  0 siblings, 0 replies; 4+ messages in thread
From: Rob Herring @ 2015-09-17 19:39 UTC (permalink / raw)
  To: linux-arm-kernel

On 09/07/2015 04:49 AM, Mark Rutland wrote:
> The GICv3 ITS uses sideband master identification data (known as a
> DeviceID) to identify which master wrote to a doorbell, and this data is
> used to determine how to react in response to the write.
> 
> Commit 1e6db000482fa65a ("irqchip/gicv3-its: Add platform MSI support")
> added support per this binding, but failed to update the documentation.
> This patch fixes the documentation.
> 
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Rob Herring <robh+dt@kernel.org>

Applied, thanks.

Rob

> ---
>  Documentation/devicetree/bindings/arm/gic-v3.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/gic-v3.txt b/Documentation/devicetree/bindings/arm/gic-v3.txt
> index ddfade4..7803e77 100644
> --- a/Documentation/devicetree/bindings/arm/gic-v3.txt
> +++ b/Documentation/devicetree/bindings/arm/gic-v3.txt
> @@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
>  These nodes must have the following properties:
>  - compatible : Should at least contain  "arm,gic-v3-its".
>  - msi-controller : Boolean property. Identifies the node as an MSI controller
> +- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
> +  which will generate the MSI.
>  - reg: Specifies the base physical address and size of the ITS
>    registers.
>  
> @@ -83,6 +85,7 @@ Examples:
>  		gic-its at 2c200000 {
>  			compatible = "arm,gic-v3-its";
>  			msi-controller;
> +			#msi-cells = <1>;
>  			reg = <0x0 0x2c200000 0 0x200000>;
>  		};
>  	};
> @@ -107,12 +110,14 @@ Examples:
>  		gic-its at 2c200000 {
>  			compatible = "arm,gic-v3-its";
>  			msi-controller;
> +			#msi-cells = <1>;
>  			reg = <0x0 0x2c200000 0 0x200000>;
>  		};
>  
>  		gic-its at 2c400000 {
>  			compatible = "arm,gic-v3-its";
>  			msi-controller;
> +			#msi-cells = <1>;
>  			reg = <0x0 0x2c400000 0 0x200000>;
>  		};
>  	};
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] Docs: dt: add #msi-cells to GICv3 ITS binding
@ 2015-09-17 19:39   ` Rob Herring
  0 siblings, 0 replies; 4+ messages in thread
From: Rob Herring @ 2015-09-17 19:39 UTC (permalink / raw)
  To: Mark Rutland
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	marc.zyngier-5wv7dgnIgG8, Rob Herring

On 09/07/2015 04:49 AM, Mark Rutland wrote:
> The GICv3 ITS uses sideband master identification data (known as a
> DeviceID) to identify which master wrote to a doorbell, and this data is
> used to determine how to react in response to the write.
> 
> Commit 1e6db000482fa65a ("irqchip/gicv3-its: Add platform MSI support")
> added support per this binding, but failed to update the documentation.
> This patch fixes the documentation.
> 
> Signed-off-by: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
> Acked-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Applied, thanks.

Rob

> ---
>  Documentation/devicetree/bindings/arm/gic-v3.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/gic-v3.txt b/Documentation/devicetree/bindings/arm/gic-v3.txt
> index ddfade4..7803e77 100644
> --- a/Documentation/devicetree/bindings/arm/gic-v3.txt
> +++ b/Documentation/devicetree/bindings/arm/gic-v3.txt
> @@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
>  These nodes must have the following properties:
>  - compatible : Should at least contain  "arm,gic-v3-its".
>  - msi-controller : Boolean property. Identifies the node as an MSI controller
> +- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
> +  which will generate the MSI.
>  - reg: Specifies the base physical address and size of the ITS
>    registers.
>  
> @@ -83,6 +85,7 @@ Examples:
>  		gic-its@2c200000 {
>  			compatible = "arm,gic-v3-its";
>  			msi-controller;
> +			#msi-cells = <1>;
>  			reg = <0x0 0x2c200000 0 0x200000>;
>  		};
>  	};
> @@ -107,12 +110,14 @@ Examples:
>  		gic-its@2c200000 {
>  			compatible = "arm,gic-v3-its";
>  			msi-controller;
> +			#msi-cells = <1>;
>  			reg = <0x0 0x2c200000 0 0x200000>;
>  		};
>  
>  		gic-its@2c400000 {
>  			compatible = "arm,gic-v3-its";
>  			msi-controller;
> +			#msi-cells = <1>;
>  			reg = <0x0 0x2c400000 0 0x200000>;
>  		};
>  	};
> 

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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2015-09-17 19:39 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2015-09-07  9:49 [PATCH] Docs: dt: add #msi-cells to GICv3 ITS binding Mark Rutland
2015-09-07  9:49 ` Mark Rutland
2015-09-17 19:39 ` Rob Herring
2015-09-17 19:39   ` Rob Herring

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