* [PATCH v4 0/2] Add Cygnus PCIe Serdes/PHY support @ 2015-09-19 0:16 Ray Jui 2015-09-19 0:16 ` [PATCH v4 1/2] dt-bindings: Add Cygnus PCIe PHY binding doc Ray Jui 2015-09-19 0:16 ` [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support Ray Jui 0 siblings, 2 replies; 5+ messages in thread From: Ray Jui @ 2015-09-19 0:16 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Arnd Bergmann, linux-kernel, JD (Jiandong) Zheng, Arun Parameswaran, bcm-kernel-feedback-list, Ray Jui This patch series adds support for the Cygnus PCIe PHY This patch series is based on Linux v4.3-rc1 and is avaliable in: https://github.com/Broadcom/cygnus-linux/tree/cygnus-pcie-phy-v4 Changes from v3: - Modify the driver to use child node to represent each PCIe PHY - Update device tree binding document and examples accordingly - Add owner filed in phy ops Changes from v2: - Dropped MDC/MDIO bus driver since it's not needed to enable/disable the analog-front-end of the PCIe Serdes on Cygnus - Optimized delay waiting for PCIe analog-front-end to be fully enabled - Reduce the #phy-cell to 1 since now the MDIO PHY ID is not required Changes from v1: - Move the MDC/MDIO bus driver from drivers/phy/* to drivers/bus/* - Make the PCIe PHY device node child node of the MDIO bus - Change the PCIe PHY driver to tristate so it can be compiled as a module - Other minor changes Ray Jui (2): dt-bindings: Add Cygnus PCIe PHY binding doc phy: cygnus: pcie: Add Cygnus PCIe PHY support .../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 +++++ drivers/phy/Kconfig | 9 + drivers/phy/Makefile | 1 + drivers/phy/phy-bcm-cygnus-pcie.c | 209 +++++++++++++++++++++ 4 files changed, 266 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt create mode 100644 drivers/phy/phy-bcm-cygnus-pcie.c -- 1.9.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 1/2] dt-bindings: Add Cygnus PCIe PHY binding doc 2015-09-19 0:16 [PATCH v4 0/2] Add Cygnus PCIe Serdes/PHY support Ray Jui @ 2015-09-19 0:16 ` Ray Jui 2015-09-19 0:16 ` [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support Ray Jui 1 sibling, 0 replies; 5+ messages in thread From: Ray Jui @ 2015-09-19 0:16 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Arnd Bergmann, linux-kernel, JD (Jiandong) Zheng, Arun Parameswaran, bcm-kernel-feedback-list, Ray Jui Add DT binding document for Broadcom Cygnus PCIe PHYs Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Arun Parameswaran <aparames@broadcom.com> Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> --- .../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt new file mode 100644 index 0000000..761c4bc --- /dev/null +++ b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt @@ -0,0 +1,47 @@ +Broadcom Cygnus PCIe PHY + +Required properties: +- compatible: must be "brcm,cygnus-pcie-phy" +- reg: base address and length of the PCIe PHY block +- #address-cells: must be 1 +- #size-cells: must be 0 + +Each PCIe PHY should be represented by a child node + +Required properties For the child node: +- reg: the PHY ID +0 - PCIe RC 0 +1 - PCIe RC 1 +- #phy-cells: must be 0 + +Example: + pcie_phy: phy@0301d0a0 { + compatible = "brcm,cygnus-pcie-phy"; + reg = <0x0301d0a0 0x14>; + + pcie0_phy: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + pcie1_phy: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + }; + + /* users of the PCIe phy */ + + pcie0: pcie@18012000 { + ... + ... + phys = <&pcie0_phy>; + phy-names = "pcie-phy"; + }; + + pcie1: pcie@18013000 { + ... + ... + phys = <pcie1_phy>; + phy-names = "pcie-phy"; + }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support 2015-09-19 0:16 [PATCH v4 0/2] Add Cygnus PCIe Serdes/PHY support Ray Jui 2015-09-19 0:16 ` [PATCH v4 1/2] dt-bindings: Add Cygnus PCIe PHY binding doc Ray Jui @ 2015-09-19 0:16 ` Ray Jui 2015-09-21 6:01 ` Kishon Vijay Abraham I 1 sibling, 1 reply; 5+ messages in thread From: Ray Jui @ 2015-09-19 0:16 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Arnd Bergmann, linux-kernel, JD (Jiandong) Zheng, Arun Parameswaran, bcm-kernel-feedback-list, Ray Jui This patch adds the PCIe PHY support for the Broadcom PCIe RC interface on Cygnus Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Arun Parameswaran <aparames@broadcom.com> Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> --- drivers/phy/Kconfig | 9 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-bcm-cygnus-pcie.c | 209 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 219 insertions(+) create mode 100644 drivers/phy/phy-bcm-cygnus-pcie.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 47da573..947bae2 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -371,4 +371,13 @@ config PHY_BRCMSTB_SATA Enable this to support the SATA3 PHY on 28nm Broadcom STB SoCs. Likely useful only with CONFIG_SATA_BRCMSTB enabled. +config PHY_CYGNUS_PCIE + tristate "Broadcom Cygnus PCIe PHY driver" + depends on OF && (ARCH_BCM_CYGNUS || COMPILE_TEST) + select GENERIC_PHY + default ARCH_BCM_CYGNUS + help + Enable this to support the Broadcom Cygnus PCIe PHY. + If unsure, say N. + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index a5b18c1..fdce78d 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -46,3 +46,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o obj-$(CONFIG_PHY_BRCMSTB_SATA) += phy-brcmstb-sata.o obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o +obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o diff --git a/drivers/phy/phy-bcm-cygnus-pcie.c b/drivers/phy/phy-bcm-cygnus-pcie.c new file mode 100644 index 0000000..132ebeb --- /dev/null +++ b/drivers/phy/phy-bcm-cygnus-pcie.c @@ -0,0 +1,209 @@ +/* + * Copyright (C) 2015 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> + +#define PCIE_CFG_OFFSET 0x00 +#define PCIE1_PHY_IDDQ_SHIFT 10 +#define PCIE0_PHY_IDDQ_SHIFT 2 + +enum cygnus_pcie_phy_id { + CYGNUS_PHY_PCIE0 = 0, + CYGNUS_PHY_PCIE1, + MAX_NUM_PHYS, +}; + +struct cygnus_pcie_phy_core; + +/** + * struct cygnus_pcie_phy - Cygnus PCIe PHY device + * @core: pointer to the Cygnus PCIe PHY core control + * @id: internal ID to identify the Cygnus PCIe PHY + * @phy: pointer to the kernel PHY device + */ +struct cygnus_pcie_phy { + struct cygnus_pcie_phy_core *core; + enum cygnus_pcie_phy_id id; + struct phy *phy; +}; + +/** + * struct cygnus_pcie_phy_core - Cygnus PCIe PHY core control + * @dev: pointer to device + * @base: base register + * @lock: mutex to protect access to individual PHYs + * @phys: pointer to Cygnus PHY device + */ +struct cygnus_pcie_phy_core { + struct device *dev; + void __iomem *base; + struct mutex lock; + struct cygnus_pcie_phy phys[MAX_NUM_PHYS]; +}; + +static int cygnus_pcie_power_config(struct cygnus_pcie_phy *phy, bool enable) +{ + struct cygnus_pcie_phy_core *core = phy->core; + unsigned shift; + u32 val; + + mutex_lock(&core->lock); + + switch (phy->id) { + case CYGNUS_PHY_PCIE0: + shift = PCIE0_PHY_IDDQ_SHIFT; + break; + + case CYGNUS_PHY_PCIE1: + shift = PCIE1_PHY_IDDQ_SHIFT; + break; + + default: + mutex_unlock(&core->lock); + dev_err(core->dev, "PCIe PHY %d invalid\n", phy->id); + return -EINVAL; + } + + if (enable) { + val = readl(core->base + PCIE_CFG_OFFSET); + val &= ~BIT(shift); + writel(val, core->base + PCIE_CFG_OFFSET); + msleep(50); + } else { + val = readl(core->base + PCIE_CFG_OFFSET); + val |= BIT(shift); + writel(val, core->base + PCIE_CFG_OFFSET); + } + + mutex_unlock(&core->lock); + dev_info(core->dev, "PCIe PHY %d %s\n", phy->id, + enable ? "enabled" : "disabled"); + return 0; +} + +static int cygnus_pcie_phy_power_on(struct phy *p) +{ + struct cygnus_pcie_phy *phy = phy_get_drvdata(p); + + return cygnus_pcie_power_config(phy, true); +} + +static int cygnus_pcie_phy_power_off(struct phy *p) +{ + struct cygnus_pcie_phy *phy = phy_get_drvdata(p); + + return cygnus_pcie_power_config(phy, false); +} + +static struct phy_ops cygnus_pcie_phy_ops = { + .power_on = cygnus_pcie_phy_power_on, + .power_off = cygnus_pcie_phy_power_off, + .owner = THIS_MODULE, +}; + +static int cygnus_pcie_phy_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node, *child; + struct cygnus_pcie_phy_core *core; + struct phy_provider *provider; + struct resource *res; + unsigned cnt = 0; + + if (of_get_child_count(node) == 0) { + dev_err(dev, "PHY no child node\n"); + return -ENODEV; + } + + core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); + if (!core) + return -ENOMEM; + + core->dev = dev; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + core->base = devm_ioremap_resource(dev, res); + if (IS_ERR(core->base)) + return PTR_ERR(core->base); + + mutex_init(&core->lock); + + for_each_available_child_of_node(node, child) { + unsigned int id; + struct cygnus_pcie_phy *p; + + if (of_property_read_u32(child, "reg", &id)) { + dev_err(dev, "missing reg property for %s\n", + child->name); + return -EINVAL; + } + + if (id >= MAX_NUM_PHYS) { + dev_err(dev, "invalid PHY id: %u\n", id); + return -EINVAL; + } + + if (core->phys[id].phy) { + dev_err(dev, "duplicated PHY id: %u\n", id); + return -EINVAL; + } + + p = &core->phys[id]; + p->phy = devm_phy_create(dev, child, &cygnus_pcie_phy_ops); + if (IS_ERR(p->phy)) { + dev_err(dev, "failed to create PHY\n"); + return PTR_ERR(p->phy); + } + + p->core = core; + p->id = id; + phy_set_drvdata(p->phy, p); + cnt++; + } + + dev_set_drvdata(dev, core); + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(provider)) { + dev_err(dev, "failed to register PHY provider\n"); + return PTR_ERR(provider); + } + + dev_info(dev, "registered %u PCIe PHY(s)\n", cnt); + + return 0; +} + +static const struct of_device_id cygnus_pcie_phy_match_table[] = { + { .compatible = "brcm,cygnus-pcie-phy" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, cygnus_pcie_phy_match_table); + +static struct platform_driver cygnus_pcie_phy_driver = { + .driver = { + .name = "cygnus-pcie-phy", + .of_match_table = cygnus_pcie_phy_match_table, + }, + .probe = cygnus_pcie_phy_probe, +}; +module_platform_driver(cygnus_pcie_phy_driver); + +MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>"); +MODULE_DESCRIPTION("Broadcom Cygnus PCIe PHY driver"); +MODULE_LICENSE("GPL v2"); -- 1.9.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support 2015-09-19 0:16 ` [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support Ray Jui @ 2015-09-21 6:01 ` Kishon Vijay Abraham I 2015-09-21 16:49 ` Ray Jui 0 siblings, 1 reply; 5+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-21 6:01 UTC (permalink / raw) To: Ray Jui Cc: Arnd Bergmann, linux-kernel, JD (Jiandong) Zheng, Arun Parameswaran, bcm-kernel-feedback-list Hi, On Saturday 19 September 2015 05:46 AM, Ray Jui wrote: > This patch adds the PCIe PHY support for the Broadcom PCIe RC interface > on Cygnus > > Signed-off-by: Ray Jui <rjui@broadcom.com> > Reviewed-by: Arun Parameswaran <aparames@broadcom.com> > Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com> > Reviewed-by: Scott Branden <sbranden@broadcom.com> > --- > drivers/phy/Kconfig | 9 ++ > drivers/phy/Makefile | 1 + > drivers/phy/phy-bcm-cygnus-pcie.c | 209 ++++++++++++++++++++++++++++++++++++++ > 3 files changed, 219 insertions(+) > create mode 100644 drivers/phy/phy-bcm-cygnus-pcie.c > > diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig > index 47da573..947bae2 100644 > --- a/drivers/phy/Kconfig > +++ b/drivers/phy/Kconfig > @@ -371,4 +371,13 @@ config PHY_BRCMSTB_SATA > Enable this to support the SATA3 PHY on 28nm Broadcom STB SoCs. > Likely useful only with CONFIG_SATA_BRCMSTB enabled. > > +config PHY_CYGNUS_PCIE > + tristate "Broadcom Cygnus PCIe PHY driver" > + depends on OF && (ARCH_BCM_CYGNUS || COMPILE_TEST) > + select GENERIC_PHY > + default ARCH_BCM_CYGNUS > + help > + Enable this to support the Broadcom Cygnus PCIe PHY. > + If unsure, say N. > + > endmenu > diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile > index a5b18c1..fdce78d 100644 > --- a/drivers/phy/Makefile > +++ b/drivers/phy/Makefile > @@ -46,3 +46,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o > obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o > obj-$(CONFIG_PHY_BRCMSTB_SATA) += phy-brcmstb-sata.o > obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o > +obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o > diff --git a/drivers/phy/phy-bcm-cygnus-pcie.c b/drivers/phy/phy-bcm-cygnus-pcie.c > new file mode 100644 > index 0000000..132ebeb > --- /dev/null > +++ b/drivers/phy/phy-bcm-cygnus-pcie.c > @@ -0,0 +1,209 @@ > +/* > + * Copyright (C) 2015 Broadcom Corporation > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation version 2. > + * > + * This program is distributed "as is" WITHOUT ANY WARRANTY of any > + * kind, whether express or implied; without even the implied warranty > + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include <linux/delay.h> > +#include <linux/io.h> > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/phy/phy.h> > +#include <linux/platform_device.h> > + > +#define PCIE_CFG_OFFSET 0x00 > +#define PCIE1_PHY_IDDQ_SHIFT 10 > +#define PCIE0_PHY_IDDQ_SHIFT 2 > + > +enum cygnus_pcie_phy_id { > + CYGNUS_PHY_PCIE0 = 0, > + CYGNUS_PHY_PCIE1, > + MAX_NUM_PHYS, > +}; > + > +struct cygnus_pcie_phy_core; > + > +/** > + * struct cygnus_pcie_phy - Cygnus PCIe PHY device > + * @core: pointer to the Cygnus PCIe PHY core control > + * @id: internal ID to identify the Cygnus PCIe PHY > + * @phy: pointer to the kernel PHY device > + */ > +struct cygnus_pcie_phy { > + struct cygnus_pcie_phy_core *core; > + enum cygnus_pcie_phy_id id; > + struct phy *phy; > +}; > + > +/** > + * struct cygnus_pcie_phy_core - Cygnus PCIe PHY core control > + * @dev: pointer to device > + * @base: base register > + * @lock: mutex to protect access to individual PHYs > + * @phys: pointer to Cygnus PHY device > + */ > +struct cygnus_pcie_phy_core { > + struct device *dev; > + void __iomem *base; > + struct mutex lock; > + struct cygnus_pcie_phy phys[MAX_NUM_PHYS]; > +}; > + > +static int cygnus_pcie_power_config(struct cygnus_pcie_phy *phy, bool enable) > +{ > + struct cygnus_pcie_phy_core *core = phy->core; > + unsigned shift; > + u32 val; > + > + mutex_lock(&core->lock); > + > + switch (phy->id) { > + case CYGNUS_PHY_PCIE0: > + shift = PCIE0_PHY_IDDQ_SHIFT; > + break; > + > + case CYGNUS_PHY_PCIE1: > + shift = PCIE1_PHY_IDDQ_SHIFT; > + break; > + > + default: > + mutex_unlock(&core->lock); > + dev_err(core->dev, "PCIe PHY %d invalid\n", phy->id); > + return -EINVAL; > + } > + > + if (enable) { > + val = readl(core->base + PCIE_CFG_OFFSET); > + val &= ~BIT(shift); > + writel(val, core->base + PCIE_CFG_OFFSET); > + msleep(50); Document any delays added to code. > + } else { > + val = readl(core->base + PCIE_CFG_OFFSET); > + val |= BIT(shift); > + writel(val, core->base + PCIE_CFG_OFFSET); > + } > + > + mutex_unlock(&core->lock); > + dev_info(core->dev, "PCIe PHY %d %s\n", phy->id, > + enable ? "enabled" : "disabled"); dev_dbg? > + return 0; > +} > + > +static int cygnus_pcie_phy_power_on(struct phy *p) > +{ > + struct cygnus_pcie_phy *phy = phy_get_drvdata(p); > + > + return cygnus_pcie_power_config(phy, true); > +} > + > +static int cygnus_pcie_phy_power_off(struct phy *p) > +{ > + struct cygnus_pcie_phy *phy = phy_get_drvdata(p); > + > + return cygnus_pcie_power_config(phy, false); > +} > + > +static struct phy_ops cygnus_pcie_phy_ops = { > + .power_on = cygnus_pcie_phy_power_on, > + .power_off = cygnus_pcie_phy_power_off, > + .owner = THIS_MODULE, > +}; > + > +static int cygnus_pcie_phy_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct device_node *node = dev->of_node, *child; > + struct cygnus_pcie_phy_core *core; > + struct phy_provider *provider; > + struct resource *res; > + unsigned cnt = 0; > + > + if (of_get_child_count(node) == 0) { > + dev_err(dev, "PHY no child node\n"); > + return -ENODEV; > + } > + > + core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); > + if (!core) > + return -ENOMEM; > + > + core->dev = dev; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + core->base = devm_ioremap_resource(dev, res); > + if (IS_ERR(core->base)) > + return PTR_ERR(core->base); > + > + mutex_init(&core->lock); > + > + for_each_available_child_of_node(node, child) { > + unsigned int id; > + struct cygnus_pcie_phy *p; > + > + if (of_property_read_u32(child, "reg", &id)) { > + dev_err(dev, "missing reg property for %s\n", > + child->name); > + return -EINVAL; > + } > + > + if (id >= MAX_NUM_PHYS) { > + dev_err(dev, "invalid PHY id: %u\n", id); > + return -EINVAL; > + } > + > + if (core->phys[id].phy) { > + dev_err(dev, "duplicated PHY id: %u\n", id); > + return -EINVAL; > + } > + > + p = &core->phys[id]; > + p->phy = devm_phy_create(dev, child, &cygnus_pcie_phy_ops); > + if (IS_ERR(p->phy)) { > + dev_err(dev, "failed to create PHY\n"); > + return PTR_ERR(p->phy); > + } > + > + p->core = core; > + p->id = id; > + phy_set_drvdata(p->phy, p); > + cnt++; > + } > + > + dev_set_drvdata(dev, core); > + > + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); > + if (IS_ERR(provider)) { > + dev_err(dev, "failed to register PHY provider\n"); > + return PTR_ERR(provider); > + } > + > + dev_info(dev, "registered %u PCIe PHY(s)\n", cnt); dev_dbg? Don't want to amke the boot noisy. Thanks Kishon ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support 2015-09-21 6:01 ` Kishon Vijay Abraham I @ 2015-09-21 16:49 ` Ray Jui 0 siblings, 0 replies; 5+ messages in thread From: Ray Jui @ 2015-09-21 16:49 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Arnd Bergmann, linux-kernel, JD (Jiandong) Zheng, Arun Parameswaran, bcm-kernel-feedback-list On 9/20/2015 11:01 PM, Kishon Vijay Abraham I wrote: > Hi, > > On Saturday 19 September 2015 05:46 AM, Ray Jui wrote: >> This patch adds the PCIe PHY support for the Broadcom PCIe RC interface >> on Cygnus >> >> Signed-off-by: Ray Jui <rjui@broadcom.com> >> Reviewed-by: Arun Parameswaran <aparames@broadcom.com> >> Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com> >> Reviewed-by: Scott Branden <sbranden@broadcom.com> >> --- >> drivers/phy/Kconfig | 9 ++ >> drivers/phy/Makefile | 1 + >> drivers/phy/phy-bcm-cygnus-pcie.c | 209 ++++++++++++++++++++++++++++++++++++++ >> 3 files changed, 219 insertions(+) >> create mode 100644 drivers/phy/phy-bcm-cygnus-pcie.c >> >> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig >> index 47da573..947bae2 100644 >> --- a/drivers/phy/Kconfig >> +++ b/drivers/phy/Kconfig >> @@ -371,4 +371,13 @@ config PHY_BRCMSTB_SATA >> Enable this to support the SATA3 PHY on 28nm Broadcom STB SoCs. >> Likely useful only with CONFIG_SATA_BRCMSTB enabled. >> >> +config PHY_CYGNUS_PCIE >> + tristate "Broadcom Cygnus PCIe PHY driver" >> + depends on OF && (ARCH_BCM_CYGNUS || COMPILE_TEST) >> + select GENERIC_PHY >> + default ARCH_BCM_CYGNUS >> + help >> + Enable this to support the Broadcom Cygnus PCIe PHY. >> + If unsure, say N. >> + >> endmenu >> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile >> index a5b18c1..fdce78d 100644 >> --- a/drivers/phy/Makefile >> +++ b/drivers/phy/Makefile >> @@ -46,3 +46,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o >> obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o >> obj-$(CONFIG_PHY_BRCMSTB_SATA) += phy-brcmstb-sata.o >> obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o >> +obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o >> diff --git a/drivers/phy/phy-bcm-cygnus-pcie.c b/drivers/phy/phy-bcm-cygnus-pcie.c >> new file mode 100644 >> index 0000000..132ebeb >> --- /dev/null >> +++ b/drivers/phy/phy-bcm-cygnus-pcie.c >> @@ -0,0 +1,209 @@ >> +/* >> + * Copyright (C) 2015 Broadcom Corporation >> + * >> + * This program is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation version 2. >> + * >> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any >> + * kind, whether express or implied; without even the implied warranty >> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + */ >> + >> +#include <linux/delay.h> >> +#include <linux/io.h> >> +#include <linux/module.h> >> +#include <linux/of.h> >> +#include <linux/phy/phy.h> >> +#include <linux/platform_device.h> >> + >> +#define PCIE_CFG_OFFSET 0x00 >> +#define PCIE1_PHY_IDDQ_SHIFT 10 >> +#define PCIE0_PHY_IDDQ_SHIFT 2 >> + >> +enum cygnus_pcie_phy_id { >> + CYGNUS_PHY_PCIE0 = 0, >> + CYGNUS_PHY_PCIE1, >> + MAX_NUM_PHYS, >> +}; >> + >> +struct cygnus_pcie_phy_core; >> + >> +/** >> + * struct cygnus_pcie_phy - Cygnus PCIe PHY device >> + * @core: pointer to the Cygnus PCIe PHY core control >> + * @id: internal ID to identify the Cygnus PCIe PHY >> + * @phy: pointer to the kernel PHY device >> + */ >> +struct cygnus_pcie_phy { >> + struct cygnus_pcie_phy_core *core; >> + enum cygnus_pcie_phy_id id; >> + struct phy *phy; >> +}; >> + >> +/** >> + * struct cygnus_pcie_phy_core - Cygnus PCIe PHY core control >> + * @dev: pointer to device >> + * @base: base register >> + * @lock: mutex to protect access to individual PHYs >> + * @phys: pointer to Cygnus PHY device >> + */ >> +struct cygnus_pcie_phy_core { >> + struct device *dev; >> + void __iomem *base; >> + struct mutex lock; >> + struct cygnus_pcie_phy phys[MAX_NUM_PHYS]; >> +}; >> + >> +static int cygnus_pcie_power_config(struct cygnus_pcie_phy *phy, bool enable) >> +{ >> + struct cygnus_pcie_phy_core *core = phy->core; >> + unsigned shift; >> + u32 val; >> + >> + mutex_lock(&core->lock); >> + >> + switch (phy->id) { >> + case CYGNUS_PHY_PCIE0: >> + shift = PCIE0_PHY_IDDQ_SHIFT; >> + break; >> + >> + case CYGNUS_PHY_PCIE1: >> + shift = PCIE1_PHY_IDDQ_SHIFT; >> + break; >> + >> + default: >> + mutex_unlock(&core->lock); >> + dev_err(core->dev, "PCIe PHY %d invalid\n", phy->id); >> + return -EINVAL; >> + } >> + >> + if (enable) { >> + val = readl(core->base + PCIE_CFG_OFFSET); >> + val &= ~BIT(shift); >> + writel(val, core->base + PCIE_CFG_OFFSET); >> + msleep(50); > > Document any delays added to code. Okay will do that. >> + } else { >> + val = readl(core->base + PCIE_CFG_OFFSET); >> + val |= BIT(shift); >> + writel(val, core->base + PCIE_CFG_OFFSET); >> + } >> + >> + mutex_unlock(&core->lock); >> + dev_info(core->dev, "PCIe PHY %d %s\n", phy->id, >> + enable ? "enabled" : "disabled"); > > dev_dbg? > Okay. >> + return 0; >> +} >> + >> +static int cygnus_pcie_phy_power_on(struct phy *p) >> +{ >> + struct cygnus_pcie_phy *phy = phy_get_drvdata(p); >> + >> + return cygnus_pcie_power_config(phy, true); >> +} >> + >> +static int cygnus_pcie_phy_power_off(struct phy *p) >> +{ >> + struct cygnus_pcie_phy *phy = phy_get_drvdata(p); >> + >> + return cygnus_pcie_power_config(phy, false); >> +} >> + >> +static struct phy_ops cygnus_pcie_phy_ops = { >> + .power_on = cygnus_pcie_phy_power_on, >> + .power_off = cygnus_pcie_phy_power_off, >> + .owner = THIS_MODULE, >> +}; >> + >> +static int cygnus_pcie_phy_probe(struct platform_device *pdev) >> +{ >> + struct device *dev = &pdev->dev; >> + struct device_node *node = dev->of_node, *child; >> + struct cygnus_pcie_phy_core *core; >> + struct phy_provider *provider; >> + struct resource *res; >> + unsigned cnt = 0; >> + >> + if (of_get_child_count(node) == 0) { >> + dev_err(dev, "PHY no child node\n"); >> + return -ENODEV; >> + } >> + >> + core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); >> + if (!core) >> + return -ENOMEM; >> + >> + core->dev = dev; >> + >> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); >> + core->base = devm_ioremap_resource(dev, res); >> + if (IS_ERR(core->base)) >> + return PTR_ERR(core->base); >> + >> + mutex_init(&core->lock); >> + >> + for_each_available_child_of_node(node, child) { >> + unsigned int id; >> + struct cygnus_pcie_phy *p; >> + >> + if (of_property_read_u32(child, "reg", &id)) { >> + dev_err(dev, "missing reg property for %s\n", >> + child->name); >> + return -EINVAL; >> + } >> + >> + if (id >= MAX_NUM_PHYS) { >> + dev_err(dev, "invalid PHY id: %u\n", id); >> + return -EINVAL; >> + } >> + >> + if (core->phys[id].phy) { >> + dev_err(dev, "duplicated PHY id: %u\n", id); >> + return -EINVAL; >> + } >> + >> + p = &core->phys[id]; >> + p->phy = devm_phy_create(dev, child, &cygnus_pcie_phy_ops); >> + if (IS_ERR(p->phy)) { >> + dev_err(dev, "failed to create PHY\n"); >> + return PTR_ERR(p->phy); >> + } >> + >> + p->core = core; >> + p->id = id; >> + phy_set_drvdata(p->phy, p); >> + cnt++; >> + } >> + >> + dev_set_drvdata(dev, core); >> + >> + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); >> + if (IS_ERR(provider)) { >> + dev_err(dev, "failed to register PHY provider\n"); >> + return PTR_ERR(provider); >> + } >> + >> + dev_info(dev, "registered %u PCIe PHY(s)\n", cnt); > > dev_dbg? Don't want to amke the boot noisy. > Okay. > Thanks > Kishon > Thanks, Ray ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-09-21 16:49 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-09-19 0:16 [PATCH v4 0/2] Add Cygnus PCIe Serdes/PHY support Ray Jui 2015-09-19 0:16 ` [PATCH v4 1/2] dt-bindings: Add Cygnus PCIe PHY binding doc Ray Jui 2015-09-19 0:16 ` [PATCH v4 2/2] phy: cygnus: pcie: Add Cygnus PCIe PHY support Ray Jui 2015-09-21 6:01 ` Kishon Vijay Abraham I 2015-09-21 16:49 ` Ray Jui
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