From: David Daney <ddaney.cavm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: "Sean O. Stalley" <sean.stalley-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
yinghai-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
rajatxjain-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
mst-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
gong.chen-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-api-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 0/2] PCI: Add support for PCI Enhanced Allocation "BARs"
Date: Wed, 23 Sep 2015 17:34:13 -0700 [thread overview]
Message-ID: <56034505.1080301@gmail.com> (raw)
In-Reply-To: <1443047264-4003-1-git-send-email-sean.stalley-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Hi Sean,
Thanks for doing this, I think we will use it for Cavium ThunderX. A
couple of questions...
On 09/23/2015 03:27 PM, Sean O. Stalley wrote:
> PCI Enhanced Allocation is a new method of allocating MMIO & IO
> resources for PCI devices & bridges. It can be used instead
> of the traditional PCI method of using BARs.
>
> EA entries are hardware-initialized to a fixed address.
> Unlike BARs, regions described by EA are cannot be moved.
> Because of this, only devices which are permanently connected to
> the PCI bus can use EA. A removable PCI card must not use EA.
>
> This patchset adds support for using EA entries instead of BARs
> on Root Complex Integrated Endpoints.
>
> The Enhanced Allocation ECN is publicly available here:
> https://www.pcisig.com/specifications/conventional/ECN_Enhanced_Allocation_23_Oct_2014_Final.pdf
>
>
> Changes from V1:
> - Use generic PCI resource claim functions (instead of EA-specific functions)
> - Only add support for RCiEPs (instead of all devices).
Why not all devices? The spec. allows for EA on devices behind bridges.
> - Removed some debugging messages leftover from early testing.
>
>
> Sean O. Stalley (2):
> PCI: Add Enhanced Allocation register entries
> PCI: Add support for Enhanced Allocation devices
>
> drivers/pci/pci.c | 174 ++++++++++++++++++++++++++++++++++++++++++
> drivers/pci/pci.h | 1 +
> drivers/pci/probe.c | 3 +
> include/uapi/linux/pci_regs.h | 40 +++++++++-
> 4 files changed, 217 insertions(+), 1 deletion(-)
>
WARNING: multiple messages have this Message-ID (diff)
From: David Daney <ddaney.cavm@gmail.com>
To: "Sean O. Stalley" <sean.stalley@intel.com>
Cc: bhelgaas@google.com, yinghai@kernel.org, rajatxjain@gmail.com,
mst@redhat.com, zajec5@gmail.com, gong.chen@linux.intel.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-api@vger.kernel.org
Subject: Re: [PATCH v2 0/2] PCI: Add support for PCI Enhanced Allocation "BARs"
Date: Wed, 23 Sep 2015 17:34:13 -0700 [thread overview]
Message-ID: <56034505.1080301@gmail.com> (raw)
In-Reply-To: <1443047264-4003-1-git-send-email-sean.stalley@intel.com>
Hi Sean,
Thanks for doing this, I think we will use it for Cavium ThunderX. A
couple of questions...
On 09/23/2015 03:27 PM, Sean O. Stalley wrote:
> PCI Enhanced Allocation is a new method of allocating MMIO & IO
> resources for PCI devices & bridges. It can be used instead
> of the traditional PCI method of using BARs.
>
> EA entries are hardware-initialized to a fixed address.
> Unlike BARs, regions described by EA are cannot be moved.
> Because of this, only devices which are permanently connected to
> the PCI bus can use EA. A removable PCI card must not use EA.
>
> This patchset adds support for using EA entries instead of BARs
> on Root Complex Integrated Endpoints.
>
> The Enhanced Allocation ECN is publicly available here:
> https://www.pcisig.com/specifications/conventional/ECN_Enhanced_Allocation_23_Oct_2014_Final.pdf
>
>
> Changes from V1:
> - Use generic PCI resource claim functions (instead of EA-specific functions)
> - Only add support for RCiEPs (instead of all devices).
Why not all devices? The spec. allows for EA on devices behind bridges.
> - Removed some debugging messages leftover from early testing.
>
>
> Sean O. Stalley (2):
> PCI: Add Enhanced Allocation register entries
> PCI: Add support for Enhanced Allocation devices
>
> drivers/pci/pci.c | 174 ++++++++++++++++++++++++++++++++++++++++++
> drivers/pci/pci.h | 1 +
> drivers/pci/probe.c | 3 +
> include/uapi/linux/pci_regs.h | 40 +++++++++-
> 4 files changed, 217 insertions(+), 1 deletion(-)
>
next prev parent reply other threads:[~2015-09-24 0:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-23 22:27 [PATCH v2 0/2] PCI: Add support for PCI Enhanced Allocation "BARs" Sean O. Stalley
2015-09-23 22:27 ` Sean O. Stalley
2015-09-23 22:27 ` [PATCH v2 1/2] PCI: Add Enhanced Allocation register entries Sean O. Stalley
[not found] ` <1443047264-4003-1-git-send-email-sean.stalley-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-09-23 22:27 ` [PATCH v2 2/2] PCI: Add support for Enhanced Allocation devices Sean O. Stalley
2015-09-23 22:27 ` Sean O. Stalley
2015-09-24 0:34 ` David Daney [this message]
2015-09-24 0:34 ` [PATCH v2 0/2] PCI: Add support for PCI Enhanced Allocation "BARs" David Daney
2015-09-24 16:39 ` Sean O. Stalley
2015-09-23 23:26 ` Yinghai Lu
2015-09-23 23:51 ` Sean O. Stalley
2015-09-24 0:25 ` Yinghai Lu
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