[PATCH 1/2] arm64: dts: extent bus-ranges of PCIe for rk3399

[PATCH 1/2] arm64: dts: extent bus-ranges of PCIe for rk3399

[Shawn Lin]

In order to support multiple hierarchy of PCIe buses,
for instance, PCIe switch, we need to extent bus-ranges
to as max as possible. We have 32 regions and could support
up to 31 buses except bus 0 for our root bridge.

Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 25cb51d..532b89d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -220,7 +220,7 @@
 		#size-cells = <2>;
 		#interrupt-cells = <1>;
 		aspm-no-l0s;
-		bus-range = <0x0 0x1>;
+		bus-range = <0x0 0x1f>;
 		clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
 			 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
 		clock-names = "aclk", "aclk-perf",
-- 
1.9.1

[PATCH 2/2] arm64: dts: extent IORESOURCE_MEM_64 of PCIe for rk3399

[Shawn Lin]

Make full use of 32 regions and increase IORESOURCE_MEM_64
so that we could have more chance to support PCIe switch with
more endpoints attached to our RC.

Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 532b89d..74bffe7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -239,8 +239,8 @@
 		msi-map = <0x0 &its 0x0 0x1000>;
 		phys = <&pcie_phy>;
 		phy-names = "pcie-phy";
-		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
-			  0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
+		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
+			  0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
 		resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
 			 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
 			 <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
-- 
1.9.1

Re: [PATCH 1/2] arm64: dts: extent bus-ranges of PCIe for rk3399

[Heiko Stuebner]

Hi Shawn,

Am Dienstag, 16. Mai 2017, 14:30:40 CEST schrieb Shawn Lin:
> In order to support multiple hierarchy of PCIe buses,
> for instance, PCIe switch, we need to extent bus-ranges
> to as max as possible. We have 32 regions and could support
> up to 31 buses except bus 0 for our root bridge.
> 
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

can these 2 patches really be independent?

I.e. what happens if only this patch1 is applied and patch2 is not?
[important for bisectability]


Heiko

> ---
> 
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 25cb51d..532b89d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -220,7 +220,7 @@
>  		#size-cells = <2>;
>  		#interrupt-cells = <1>;
>  		aspm-no-l0s;
> -		bus-range = <0x0 0x1>;
> +		bus-range = <0x0 0x1f>;
>  		clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
>  			 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
>  		clock-names = "aclk", "aclk-perf",
> 

Re: [PATCH 1/2] arm64: dts: extent bus-ranges of PCIe for rk3399

[Shawn Lin]

Hi Heiko,

在 2017/5/19 19:53, Heiko Stuebner 写道:
> Hi Shawn,
>
> Am Dienstag, 16. Mai 2017, 14:30:40 CEST schrieb Shawn Lin:
>> In order to support multiple hierarchy of PCIe buses,
>> for instance, PCIe switch, we need to extent bus-ranges
>> to as max as possible. We have 32 regions and could support
>> up to 31 buses except bus 0 for our root bridge.
>>
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> can these 2 patches really be independent?

yes, they are sloving two different issues, so I think
they could be applied as-is.

For patch 1, we was trying to ask PCI core to scan more
buses as possible, otherwise it now only scan one, which
isn't enough for PCIe switch chip.

And before patch 2, we only allocated limited regions for
devices attached to our root bridge, so we will fail to enable
some devices if they ask more memory resource.

>
> I.e. what happens if only this patch1 is applied and patch2 is not?
> [important for bisectability]
>
>
> Heiko
>
>> ---
>>
>>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 25cb51d..532b89d 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -220,7 +220,7 @@
>>  		#size-cells = <2>;
>>  		#interrupt-cells = <1>;
>>  		aspm-no-l0s;
>> -		bus-range = <0x0 0x1>;
>> +		bus-range = <0x0 0x1f>;
>>  		clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
>>  			 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
>>  		clock-names = "aclk", "aclk-perf",
>>
>
>
>
>
>


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Re: [PATCH 1/2] arm64: dts: extent bus-ranges of PCIe for rk3399

[Heiko Stuebner]

Am Montag, 22. Mai 2017, 09:20:59 CEST schrieb Shawn Lin:
> Hi Heiko,
> 
> 在 2017/5/19 19:53, Heiko Stuebner 写道:
> > Hi Shawn,
> >
> > Am Dienstag, 16. Mai 2017, 14:30:40 CEST schrieb Shawn Lin:
> >> In order to support multiple hierarchy of PCIe buses,
> >> for instance, PCIe switch, we need to extent bus-ranges
> >> to as max as possible. We have 32 regions and could support
> >> up to 31 buses except bus 0 for our root bridge.
> >>
> >> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> >
> > can these 2 patches really be independent?
> 
> yes, they are sloving two different issues, so I think
> they could be applied as-is.
> 
> For patch 1, we was trying to ask PCI core to scan more
> buses as possible, otherwise it now only scan one, which
> isn't enough for PCIe switch chip.
> 
> And before patch 2, we only allocated limited regions for
> devices attached to our root bridge, so we will fail to enable
> some devices if they ask more memory resource.

ok, applied both for 4.13


Thanks
Heiko

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Re: [PATCH 1/2] arm64: dts: extent bus-ranges of PCIe for rk3399

[Heiko Stuebner]

Am Dienstag, 23. Mai 2017, 10:42:27 CEST schrieb Heiko Stuebner:
> Am Montag, 22. Mai 2017, 09:20:59 CEST schrieb Shawn Lin:
> > Hi Heiko,
> > 
> > 在 2017/5/19 19:53, Heiko Stuebner 写道:
> > > Hi Shawn,
> > >
> > > Am Dienstag, 16. Mai 2017, 14:30:40 CEST schrieb Shawn Lin:
> > >> In order to support multiple hierarchy of PCIe buses,
> > >> for instance, PCIe switch, we need to extent bus-ranges
> > >> to as max as possible. We have 32 regions and could support
> > >> up to 31 buses except bus 0 for our root bridge.
> > >>
> > >> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> > >
> > > can these 2 patches really be independent?
> > 
> > yes, they are sloving two different issues, so I think
> > they could be applied as-is.
> > 
> > For patch 1, we was trying to ask PCI core to scan more
> > buses as possible, otherwise it now only scan one, which
> > isn't enough for PCIe switch chip.
> > 
> > And before patch 2, we only allocated limited regions for
> > devices attached to our root bridge, so we will fail to enable
> > some devices if they ask more memory resource.
> 
> ok, applied both for 4.13

just saw, that you may want to remember to include more people
in devicetree patches ... especially the linux-arm-kernel@lists.infradead.org
list. Doesn't hinder this patchset, but worth remembering for future series.


Heiko

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