From: John Snow <jsnow@redhat.com>
To: Beniamino Galvani <b.galvani@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Rob Herring <rob.herring@linaro.org>,
Igor Mitsyanko <i.mitsyanko@gmail.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Nathan Rossi <nathan@nathanrossi.com>,
Sai Pavan Boddu <saipava@xilinx.com>,
Peter Crosthwaite <crosthwaitepeter@gmail.com>,
Richard Purdie <richard.purdie@linuxfoundation.org>,
Alistair Francis <alistair.francis@xilinx.com>,
Guenter Roeck <linux@roeck-us.net>
Subject: Re: [Qemu-devel] QEMU+Linux ARMv7A current state
Date: Mon, 5 Oct 2015 17:28:00 -0400 [thread overview]
Message-ID: <5612EB60.2070709@redhat.com> (raw)
In-Reply-To: <20151005204402.GB3258@gmail.com>
On 10/05/2015 04:44 PM, Beniamino Galvani wrote:
> On Mon, Oct 05, 2015 at 11:13:33AM -0400, John Snow wrote:
>> I'm looking into the cubieboard now. Is our emulation based on any
>> particular model? (1-4?)
>
> The first model, the one with Allwinner A10.
>
>> I'm trying to see if I can find anything that resembles a spec to see
>> what kind of registers this SoC has for its SATA controller.
>
> There is some documentation on the SoC here, but apparently nothing on
> SATA:
>
> http://dl.linux-sunxi.org/A10/
>
> Beniamino
>
http://linux-sunxi.org/SATA looks relevant...
http://dl.cubieforums.com/files/pdf/A10_development_board_user_manual--2011.9.23_English.pdf
mentions the feature list:
The board provides one SATA interface, which features:
- Support SATA 1.5Gb/s, and SATA 3.0Gb/s
- Compliant to SATA Spec. 2.6, and AHCI Revision 1.3 Specifications
- Support industry-standard AMBA High-Performance Bus (AHB) and fully
compliant to the AMBA Specification, Revision 2.0; Support 32-bit Little
Endian
- OOB signaling detection and generation
- SATA 1.5Gb/s and SATA 3.0Gb/s speed negotiation when Tx OOB signaling
is selected
- Support device hot-plugging
- Support power management features including automatic Partial to
Slumber transition
- Internal DMA Engine for Command and Data Transactions
- Support hardware-assisted Native Command Queuing (NCQ) for up to
32-entries
- Support external SATA (eSATA)
I can't find anything else, though. I'll just have to wait from Peter to
see what registers he needed to modify to get it working.
Thanks,
--js
prev parent reply other threads:[~2015-10-05 21:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-03 21:31 [Qemu-devel] QEMU+Linux ARMv7A current state Peter Crosthwaite
2015-10-03 21:51 ` Peter Maydell
2015-10-03 22:14 ` Peter Crosthwaite
2015-10-03 23:19 ` Peter Crosthwaite
2015-10-04 10:42 ` Peter Maydell
2015-10-04 0:21 ` Guenter Roeck
2015-10-04 1:48 ` Peter Crosthwaite
2015-10-04 19:56 ` Beniamino Galvani
2015-10-04 21:11 ` Guenter Roeck
2015-10-04 21:38 ` Beniamino Galvani
2015-10-05 1:08 ` Guenter Roeck
2015-10-05 2:21 ` Peter Crosthwaite
2015-10-05 4:09 ` Guenter Roeck
2015-10-11 16:33 ` Peter Crosthwaite
2015-10-04 21:39 ` Peter Crosthwaite
2015-10-04 22:08 ` Peter Maydell
2015-10-11 16:37 ` Peter Crosthwaite
2015-10-05 15:13 ` John Snow
2015-10-05 20:44 ` Beniamino Galvani
2015-10-05 21:28 ` John Snow [this message]
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