From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function
Date: Thu, 08 Oct 2015 17:02:27 +0100 [thread overview]
Message-ID: <56169393.5050606@arm.com> (raw)
In-Reply-To: <20151008155404.GN17192@e104818-lin.cambridge.arm.com>
On 08/10/15 16:54, Catalin Marinas wrote:
> On Fri, Oct 02, 2015 at 05:37:51PM +0100, Marc Zyngier wrote:
>> +static inline bool gic_enable_sre(void)
>> +{
>> + u64 val;
>> +
>> + asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
>> + if (val & ICC_SRE_EL1_SRE)
>> + return true;
>> +
>> + val |= ICC_SRE_EL1_SRE;
>> + asm volatile("msr_s " __stringify(ICC_SRE_EL1) ", %0" : : "r" (val));
>> + isb();
>> + asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
>> +
>> + return !!(val & ICC_SRE_EL1_SRE);
>> +}
>
> I don't think !! is needed ;). Apparently, from ISO C99: "When any
> scalar value is converted to _Bool, the result is 0 if the value
> compares equal to 0; otherwise, the result is 1."
Are you going to break my fingers? ;-)
>From my very own PoV, !! acts as a reminder that I have realised what
the return type is. Yeah, that's how bad my brain is these days :-)
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Will Deacon <will.deacon@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function
Date: Thu, 08 Oct 2015 17:02:27 +0100 [thread overview]
Message-ID: <56169393.5050606@arm.com> (raw)
In-Reply-To: <20151008155404.GN17192@e104818-lin.cambridge.arm.com>
On 08/10/15 16:54, Catalin Marinas wrote:
> On Fri, Oct 02, 2015 at 05:37:51PM +0100, Marc Zyngier wrote:
>> +static inline bool gic_enable_sre(void)
>> +{
>> + u64 val;
>> +
>> + asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
>> + if (val & ICC_SRE_EL1_SRE)
>> + return true;
>> +
>> + val |= ICC_SRE_EL1_SRE;
>> + asm volatile("msr_s " __stringify(ICC_SRE_EL1) ", %0" : : "r" (val));
>> + isb();
>> + asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
>> +
>> + return !!(val & ICC_SRE_EL1_SRE);
>> +}
>
> I don't think !! is needed ;). Apparently, from ISO C99: "When any
> scalar value is converted to _Bool, the result is 0 if the value
> compares equal to 0; otherwise, the result is 1."
Are you going to break my fingers? ;-)
>From my very own PoV, !! acts as a reminder that I have realised what
the return type is. Yeah, that's how bad my brain is these days :-)
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-10-08 16:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 16:37 [PATCH 0/5] arm64: Allow booting with GICv3 in GICv2 mode Marc Zyngier
2015-10-02 16:37 ` Marc Zyngier
2015-10-02 16:37 ` [PATCH 1/5] arm64: el2_setup: Make sure ICC_SRE_EL2.SRE sticks before using GICv3 sysregs Marc Zyngier
2015-10-02 16:37 ` Marc Zyngier
2015-10-02 16:37 ` [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function Marc Zyngier
2015-10-02 16:37 ` Marc Zyngier
2015-10-08 15:54 ` Catalin Marinas
2015-10-08 15:54 ` Catalin Marinas
2015-10-08 16:02 ` Marc Zyngier [this message]
2015-10-08 16:02 ` Marc Zyngier
2015-10-02 16:37 ` [PATCH 3/5] arm64: cpufeatures: Check ICC_EL1_SRE.SRE before enabling ARM64_HAS_SYSREG_GIC_CPUIF Marc Zyngier
2015-10-02 16:37 ` Marc Zyngier
2015-10-02 16:37 ` [PATCH 4/5] irqchip/gic: Warn if GICv3 system registers are enabled Marc Zyngier
2015-10-02 16:37 ` Marc Zyngier
2015-10-02 16:37 ` [PATCH 5/5] arm64: Update booting requirements for GICv3 in GICv2 mode Marc Zyngier
2015-10-02 16:37 ` Marc Zyngier
2015-10-08 15:56 ` [PATCH 0/5] arm64: Allow booting with " Catalin Marinas
2015-10-08 15:56 ` Catalin Marinas
2015-10-08 16:09 ` Marc Zyngier
2015-10-08 16:09 ` Marc Zyngier
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