* [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support @ 2015-09-28 12:57 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-28 12:57 UTC (permalink / raw) To: bhelgaas-hpIqsD4AKlfQT0dZR+AlfA Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA, linux-pci-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, nsekhar-l0cyMroinI0, kishon-l0cyMroinI0 Add driver modifications in pci-dra7xx to get x2 mode working in DRA72 and DRA74. Certain modifications is needed in PHY driver also which I'll send as a separate series. Kishon Vijay Abraham I (2): pci: host: pci-dra7xx: use "num-lanes" property to find phy count pci: host: pci-dra7xx: Enable x2 mode support Documentation/devicetree/bindings/pci/ti-pci.txt | 7 +- drivers/pci/host/pci-dra7xx.c | 104 +++++++++++++++++++--- 2 files changed, 97 insertions(+), 14 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 12+ messages in thread
* [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support @ 2015-09-28 12:57 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-28 12:57 UTC (permalink / raw) To: bhelgaas; +Cc: linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, kishon Add driver modifications in pci-dra7xx to get x2 mode working in DRA72 and DRA74. Certain modifications is needed in PHY driver also which I'll send as a separate series. Kishon Vijay Abraham I (2): pci: host: pci-dra7xx: use "num-lanes" property to find phy count pci: host: pci-dra7xx: Enable x2 mode support Documentation/devicetree/bindings/pci/ti-pci.txt | 7 +- drivers/pci/host/pci-dra7xx.c | 104 +++++++++++++++++++--- 2 files changed, 97 insertions(+), 14 deletions(-) -- 1.7.9.5 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [RFC PATCH 1/2] pci: host: pci-dra7xx: use "num-lanes" property to find phy count 2015-09-28 12:57 ` Kishon Vijay Abraham I @ 2015-09-28 12:57 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-28 12:57 UTC (permalink / raw) To: bhelgaas; +Cc: linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, kishon use "num-lanes" property to find phy count instead of the number phy-names property. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/pci/host/pci-dra7xx.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c index 199e29a..e15b2e2 100644 --- a/drivers/pci/host/pci-dra7xx.c +++ b/drivers/pci/host/pci-dra7xx.c @@ -66,7 +66,7 @@ struct dra7xx_pcie { void __iomem *base; struct phy **phy; - int phy_count; + int lanes; struct device *dev; struct pcie_port pp; }; @@ -328,7 +328,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) int ret; int irq; int i; - int phy_count; + u32 lanes; struct phy **phy; void __iomem *base; struct resource *res; @@ -362,17 +362,16 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) if (!base) return -ENOMEM; - phy_count = of_property_count_strings(np, "phy-names"); - if (phy_count < 0) { - dev_err(dev, "unable to find the strings\n"); - return phy_count; + if (of_property_read_u32(np, "num-lanes", &lanes)) { + dev_err(dev, "Failed to parse the number of lanes\n"); + return -EINVAL; } - phy = devm_kzalloc(dev, sizeof(*phy) * phy_count, GFP_KERNEL); + phy = devm_kzalloc(dev, sizeof(*phy) * lanes, GFP_KERNEL); if (!phy) return -ENOMEM; - for (i = 0; i < phy_count; i++) { + for (i = 0; i < lanes; i++) { snprintf(name, sizeof(name), "pcie-phy%d", i); phy[i] = devm_phy_get(dev, name); if (IS_ERR(phy[i])) @@ -392,7 +391,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) dra7xx->base = base; dra7xx->phy = phy; dra7xx->dev = dev; - dra7xx->phy_count = phy_count; + dra7xx->lanes = lanes; pm_runtime_enable(dev); ret = pm_runtime_get_sync(dev); @@ -449,7 +448,7 @@ static int __exit dra7xx_pcie_remove(struct platform_device *pdev) struct dra7xx_pcie *dra7xx = platform_get_drvdata(pdev); struct pcie_port *pp = &dra7xx->pp; struct device *dev = &pdev->dev; - int count = dra7xx->phy_count; + int count = dra7xx->lanes; if (pp->irq_domain) irq_domain_remove(pp->irq_domain); @@ -495,7 +494,7 @@ static int dra7xx_pcie_resume(struct device *dev) static int dra7xx_pcie_suspend_noirq(struct device *dev) { struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); - int count = dra7xx->phy_count; + int count = dra7xx->lanes; while (count--) { phy_power_off(dra7xx->phy[count]); @@ -508,7 +507,7 @@ static int dra7xx_pcie_suspend_noirq(struct device *dev) static int dra7xx_pcie_resume_noirq(struct device *dev) { struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); - int phy_count = dra7xx->phy_count; + int phy_count = dra7xx->lanes; int ret; int i; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [RFC PATCH 1/2] pci: host: pci-dra7xx: use "num-lanes" property to find phy count @ 2015-09-28 12:57 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-28 12:57 UTC (permalink / raw) To: bhelgaas; +Cc: linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, kishon use "num-lanes" property to find phy count instead of the number phy-names property. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/pci/host/pci-dra7xx.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c index 199e29a..e15b2e2 100644 --- a/drivers/pci/host/pci-dra7xx.c +++ b/drivers/pci/host/pci-dra7xx.c @@ -66,7 +66,7 @@ struct dra7xx_pcie { void __iomem *base; struct phy **phy; - int phy_count; + int lanes; struct device *dev; struct pcie_port pp; }; @@ -328,7 +328,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) int ret; int irq; int i; - int phy_count; + u32 lanes; struct phy **phy; void __iomem *base; struct resource *res; @@ -362,17 +362,16 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) if (!base) return -ENOMEM; - phy_count = of_property_count_strings(np, "phy-names"); - if (phy_count < 0) { - dev_err(dev, "unable to find the strings\n"); - return phy_count; + if (of_property_read_u32(np, "num-lanes", &lanes)) { + dev_err(dev, "Failed to parse the number of lanes\n"); + return -EINVAL; } - phy = devm_kzalloc(dev, sizeof(*phy) * phy_count, GFP_KERNEL); + phy = devm_kzalloc(dev, sizeof(*phy) * lanes, GFP_KERNEL); if (!phy) return -ENOMEM; - for (i = 0; i < phy_count; i++) { + for (i = 0; i < lanes; i++) { snprintf(name, sizeof(name), "pcie-phy%d", i); phy[i] = devm_phy_get(dev, name); if (IS_ERR(phy[i])) @@ -392,7 +391,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) dra7xx->base = base; dra7xx->phy = phy; dra7xx->dev = dev; - dra7xx->phy_count = phy_count; + dra7xx->lanes = lanes; pm_runtime_enable(dev); ret = pm_runtime_get_sync(dev); @@ -449,7 +448,7 @@ static int __exit dra7xx_pcie_remove(struct platform_device *pdev) struct dra7xx_pcie *dra7xx = platform_get_drvdata(pdev); struct pcie_port *pp = &dra7xx->pp; struct device *dev = &pdev->dev; - int count = dra7xx->phy_count; + int count = dra7xx->lanes; if (pp->irq_domain) irq_domain_remove(pp->irq_domain); @@ -495,7 +494,7 @@ static int dra7xx_pcie_resume(struct device *dev) static int dra7xx_pcie_suspend_noirq(struct device *dev) { struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); - int count = dra7xx->phy_count; + int count = dra7xx->lanes; while (count--) { phy_power_off(dra7xx->phy[count]); @@ -508,7 +507,7 @@ static int dra7xx_pcie_suspend_noirq(struct device *dev) static int dra7xx_pcie_resume_noirq(struct device *dev) { struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); - int phy_count = dra7xx->phy_count; + int phy_count = dra7xx->lanes; int ret; int i; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [RFC PATCH 2/2] pci: host: pci-dra7xx: Enable x2 mode support 2015-09-28 12:57 ` Kishon Vijay Abraham I @ 2015-09-28 12:57 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-28 12:57 UTC (permalink / raw) To: bhelgaas; +Cc: linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, kishon Perform syscon configurations to get x2 mode to working in DRA74x and DRA72x. Also add a new compatible string to dfferentiate DRA72x and DRA74x, since b1c0 mask is different for both these platforms. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- Documentation/devicetree/bindings/pci/ti-pci.txt | 7 +- drivers/pci/host/pci-dra7xx.c | 81 +++++++++++++++++++++- 2 files changed, 86 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt index 60e2516..1ae1705 100644 --- a/Documentation/devicetree/bindings/pci/ti-pci.txt +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt @@ -1,7 +1,8 @@ TI PCI Controllers PCIe Designware Controller - - compatible: Should be "ti,dra7-pcie"" + - compatible: Should be "ti,dra7-pcie" for DRA74x + Should be "ti,dra72-pcie" for DRA72x - reg : Two register ranges as listed in the reg-names property - reg-names : The first entry must be "ti-conf" for the TI specific registers The second entry must be "rc-dbics" for the designware pcie @@ -14,6 +15,10 @@ PCIe Designware Controller where <X> is the instance number of the pcie from the HW spec. - interrupts : Two interrupt entries must be specified. The first one is for main interrupt line and the second for MSI interrupt line. + - syscon-lane-conf : phandle/offset pair. Phandle to the system control module and the + register offset to specify 1 lane or 2 lane. + - syscon-lane-sel : phandle/offset pair. Phandle to the system control module and the + register offset to specify lane selection. - #address-cells, #size-cells, #interrupt-cells, diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c index e15b2e2..fb23a58 100644 --- a/drivers/pci/host/pci-dra7xx.c +++ b/drivers/pci/host/pci-dra7xx.c @@ -22,8 +22,11 @@ #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <linux/of_platform.h> #include <linux/resource.h> #include <linux/types.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include "pcie-designware.h" @@ -63,14 +66,22 @@ #define PCIECTRL_DRA7XX_CONF_PHY_CS 0x010C #define LINK_UP BIT(16) +#define PCIE_1LANE_2LANE_SELECTION BIT(13) +#define PCIE_B1C0_MODE_SEL BIT(2) + struct dra7xx_pcie { void __iomem *base; + u32 *b1c0_mask; struct phy **phy; int lanes; struct device *dev; struct pcie_port pp; }; +struct dra7xx_pcie_data { + u32 b1co_mode_sel_mask; +}; + #define to_dra7xx_pcie(x) container_of((x), struct dra7xx_pcie, pp) static inline u32 dra7xx_pcie_readl(struct dra7xx_pcie *pcie, u32 offset) @@ -322,6 +333,57 @@ static int __init dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx, return 0; } +static const struct of_device_id of_dra7xx_pcie_match[]; + +static int dra7xx_pcie_configure_two_lane(struct device *dev) +{ + struct device_node *np = dev->of_node; + struct regmap *pcie_syscon; + unsigned int pcie_reg; + struct dra7xx_pcie_data *data; + const struct of_device_id *match; + + match = of_match_device(of_dra7xx_pcie_match, dev); + if (!match) + return -EINVAL; + + data = (struct dra7xx_pcie_data *)match->data; + if (!data) { + dev_err(dev, "no b1c0 mask data\n"); + return -EINVAL; + } + + pcie_syscon = syscon_regmap_lookup_by_phandle(np, "syscon-lane-conf"); + if (IS_ERR(pcie_syscon)) { + dev_err(dev, "unable to get syscon-lane-conf\n"); + return -EINVAL; + } + + if (of_property_read_u32_index(np, "syscon-lane-conf", 1, &pcie_reg)) { + dev_err(dev, "couldn't get lane configuration reg offset\n"); + return -EINVAL; + } + + regmap_update_bits(pcie_syscon, pcie_reg, PCIE_1LANE_2LANE_SELECTION, + PCIE_1LANE_2LANE_SELECTION); + + pcie_syscon = syscon_regmap_lookup_by_phandle(np, "syscon-lane-sel"); + if (IS_ERR(pcie_syscon)) { + dev_err(dev, "unable to get syscon-lane-sel\n"); + return -EINVAL; + } + + if (of_property_read_u32_index(np, "syscon-lane-sel", 1, &pcie_reg)) { + dev_err(dev, "couldn't get lane selection reg offset\n"); + return -EINVAL; + } + + regmap_update_bits(pcie_syscon, pcie_reg, data->b1co_mode_sel_mask, + PCIE_B1C0_MODE_SEL); + + return 0; +} + static int __init dra7xx_pcie_probe(struct platform_device *pdev) { u32 reg; @@ -386,6 +448,14 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) phy_exit(phy[i]); goto err_phy; } + + if (i == 1) { + ret = dra7xx_pcie_configure_two_lane(dev); + if (ret < 0) { + i++; + goto err_phy; + } + } } dra7xx->base = base; @@ -541,8 +611,17 @@ static const struct dev_pm_ops dra7xx_pcie_pm_ops = { dra7xx_pcie_resume_noirq) }; +static const struct dra7xx_pcie_data dra7_pcie_data = { + .b1co_mode_sel_mask = BIT(2), +}; + +static const struct dra7xx_pcie_data dra72_pcie_data = { + .b1co_mode_sel_mask = GENMASK(2, 3), +}; + static const struct of_device_id of_dra7xx_pcie_match[] = { - { .compatible = "ti,dra7-pcie", }, + { .compatible = "ti,dra7-pcie", .data = &dra7_pcie_data }, + { .compatible = "ti,dra72-pcie", .data = &dra72_pcie_data }, {}, }; MODULE_DEVICE_TABLE(of, of_dra7xx_pcie_match); -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [RFC PATCH 2/2] pci: host: pci-dra7xx: Enable x2 mode support @ 2015-09-28 12:57 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-09-28 12:57 UTC (permalink / raw) To: bhelgaas; +Cc: linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, kishon Perform syscon configurations to get x2 mode to working in DRA74x and DRA72x. Also add a new compatible string to dfferentiate DRA72x and DRA74x, since b1c0 mask is different for both these platforms. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- Documentation/devicetree/bindings/pci/ti-pci.txt | 7 +- drivers/pci/host/pci-dra7xx.c | 81 +++++++++++++++++++++- 2 files changed, 86 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt index 60e2516..1ae1705 100644 --- a/Documentation/devicetree/bindings/pci/ti-pci.txt +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt @@ -1,7 +1,8 @@ TI PCI Controllers PCIe Designware Controller - - compatible: Should be "ti,dra7-pcie"" + - compatible: Should be "ti,dra7-pcie" for DRA74x + Should be "ti,dra72-pcie" for DRA72x - reg : Two register ranges as listed in the reg-names property - reg-names : The first entry must be "ti-conf" for the TI specific registers The second entry must be "rc-dbics" for the designware pcie @@ -14,6 +15,10 @@ PCIe Designware Controller where <X> is the instance number of the pcie from the HW spec. - interrupts : Two interrupt entries must be specified. The first one is for main interrupt line and the second for MSI interrupt line. + - syscon-lane-conf : phandle/offset pair. Phandle to the system control module and the + register offset to specify 1 lane or 2 lane. + - syscon-lane-sel : phandle/offset pair. Phandle to the system control module and the + register offset to specify lane selection. - #address-cells, #size-cells, #interrupt-cells, diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c index e15b2e2..fb23a58 100644 --- a/drivers/pci/host/pci-dra7xx.c +++ b/drivers/pci/host/pci-dra7xx.c @@ -22,8 +22,11 @@ #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <linux/of_platform.h> #include <linux/resource.h> #include <linux/types.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include "pcie-designware.h" @@ -63,14 +66,22 @@ #define PCIECTRL_DRA7XX_CONF_PHY_CS 0x010C #define LINK_UP BIT(16) +#define PCIE_1LANE_2LANE_SELECTION BIT(13) +#define PCIE_B1C0_MODE_SEL BIT(2) + struct dra7xx_pcie { void __iomem *base; + u32 *b1c0_mask; struct phy **phy; int lanes; struct device *dev; struct pcie_port pp; }; +struct dra7xx_pcie_data { + u32 b1co_mode_sel_mask; +}; + #define to_dra7xx_pcie(x) container_of((x), struct dra7xx_pcie, pp) static inline u32 dra7xx_pcie_readl(struct dra7xx_pcie *pcie, u32 offset) @@ -322,6 +333,57 @@ static int __init dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx, return 0; } +static const struct of_device_id of_dra7xx_pcie_match[]; + +static int dra7xx_pcie_configure_two_lane(struct device *dev) +{ + struct device_node *np = dev->of_node; + struct regmap *pcie_syscon; + unsigned int pcie_reg; + struct dra7xx_pcie_data *data; + const struct of_device_id *match; + + match = of_match_device(of_dra7xx_pcie_match, dev); + if (!match) + return -EINVAL; + + data = (struct dra7xx_pcie_data *)match->data; + if (!data) { + dev_err(dev, "no b1c0 mask data\n"); + return -EINVAL; + } + + pcie_syscon = syscon_regmap_lookup_by_phandle(np, "syscon-lane-conf"); + if (IS_ERR(pcie_syscon)) { + dev_err(dev, "unable to get syscon-lane-conf\n"); + return -EINVAL; + } + + if (of_property_read_u32_index(np, "syscon-lane-conf", 1, &pcie_reg)) { + dev_err(dev, "couldn't get lane configuration reg offset\n"); + return -EINVAL; + } + + regmap_update_bits(pcie_syscon, pcie_reg, PCIE_1LANE_2LANE_SELECTION, + PCIE_1LANE_2LANE_SELECTION); + + pcie_syscon = syscon_regmap_lookup_by_phandle(np, "syscon-lane-sel"); + if (IS_ERR(pcie_syscon)) { + dev_err(dev, "unable to get syscon-lane-sel\n"); + return -EINVAL; + } + + if (of_property_read_u32_index(np, "syscon-lane-sel", 1, &pcie_reg)) { + dev_err(dev, "couldn't get lane selection reg offset\n"); + return -EINVAL; + } + + regmap_update_bits(pcie_syscon, pcie_reg, data->b1co_mode_sel_mask, + PCIE_B1C0_MODE_SEL); + + return 0; +} + static int __init dra7xx_pcie_probe(struct platform_device *pdev) { u32 reg; @@ -386,6 +448,14 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) phy_exit(phy[i]); goto err_phy; } + + if (i == 1) { + ret = dra7xx_pcie_configure_two_lane(dev); + if (ret < 0) { + i++; + goto err_phy; + } + } } dra7xx->base = base; @@ -541,8 +611,17 @@ static const struct dev_pm_ops dra7xx_pcie_pm_ops = { dra7xx_pcie_resume_noirq) }; +static const struct dra7xx_pcie_data dra7_pcie_data = { + .b1co_mode_sel_mask = BIT(2), +}; + +static const struct dra7xx_pcie_data dra72_pcie_data = { + .b1co_mode_sel_mask = GENMASK(2, 3), +}; + static const struct of_device_id of_dra7xx_pcie_match[] = { - { .compatible = "ti,dra7-pcie", }, + { .compatible = "ti,dra7-pcie", .data = &dra7_pcie_data }, + { .compatible = "ti,dra72-pcie", .data = &dra72_pcie_data }, {}, }; MODULE_DEVICE_TABLE(of, of_dra7xx_pcie_match); -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support 2015-09-28 12:57 ` Kishon Vijay Abraham I ` (2 preceding siblings ...) (?) @ 2015-10-09 22:50 ` Bjorn Helgaas 2015-10-09 23:16 ` Kishon Vijay Abraham I -1 siblings, 1 reply; 12+ messages in thread From: Bjorn Helgaas @ 2015-10-09 22:50 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: bhelgaas, linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, Arnd Bergmann, Rob Herring [+cc Arnd, Rob] On Mon, Sep 28, 2015 at 06:27:36PM +0530, Kishon Vijay Abraham I wrote: > Add driver modifications in pci-dra7xx to get x2 mode working in > DRA72 and DRA74. Certain modifications is needed in PHY driver also > which I'll send as a separate series. > > Kishon Vijay Abraham I (2): > pci: host: pci-dra7xx: use "num-lanes" property to find phy count > pci: host: pci-dra7xx: Enable x2 mode support Applied to pci/host-dra7xx for v4.4, thanks! I adjusted the subject line capitalization & format to match the history. Arnd, Rob, any comments on the DT updates or the "num-lanes" vs number of strings in "phy-names" changes? Bjorn ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support 2015-10-09 22:50 ` [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support Bjorn Helgaas @ 2015-10-09 23:16 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-10-09 23:16 UTC (permalink / raw) To: Bjorn Helgaas Cc: bhelgaas, linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, Arnd Bergmann, Rob Herring Hi Bjorn, On Saturday 10 October 2015 04:20 AM, Bjorn Helgaas wrote: > [+cc Arnd, Rob] > > On Mon, Sep 28, 2015 at 06:27:36PM +0530, Kishon Vijay Abraham I wrote: >> Add driver modifications in pci-dra7xx to get x2 mode working in >> DRA72 and DRA74. Certain modifications is needed in PHY driver also >> which I'll send as a separate series. >> >> Kishon Vijay Abraham I (2): >> pci: host: pci-dra7xx: use "num-lanes" property to find phy count >> pci: host: pci-dra7xx: Enable x2 mode support > > Applied to pci/host-dra7xx for v4.4, thanks! > > I adjusted the subject line capitalization & format to match the history. > > Arnd, Rob, any comments on the DT updates or the "num-lanes" vs number of > strings in "phy-names" changes? I sent it as RFC since I didn't have the board to test 2 lane mode with $patch. And just now I got a board to test x2 and I found a problem with the 2nd patch. .b1co_mode_sel_mask = GENMASK(2, 3), in the patch should be replaced with .b1co_mode_sel_mask = GENMASK(3, 2). I'll resend the patch fixing the above. Thanks Kishon ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support @ 2015-10-09 23:16 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-10-09 23:16 UTC (permalink / raw) To: Bjorn Helgaas Cc: bhelgaas, linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, Arnd Bergmann, Rob Herring Hi Bjorn, On Saturday 10 October 2015 04:20 AM, Bjorn Helgaas wrote: > [+cc Arnd, Rob] > > On Mon, Sep 28, 2015 at 06:27:36PM +0530, Kishon Vijay Abraham I wrote: >> Add driver modifications in pci-dra7xx to get x2 mode working in >> DRA72 and DRA74. Certain modifications is needed in PHY driver also >> which I'll send as a separate series. >> >> Kishon Vijay Abraham I (2): >> pci: host: pci-dra7xx: use "num-lanes" property to find phy count >> pci: host: pci-dra7xx: Enable x2 mode support > > Applied to pci/host-dra7xx for v4.4, thanks! > > I adjusted the subject line capitalization & format to match the history. > > Arnd, Rob, any comments on the DT updates or the "num-lanes" vs number of > strings in "phy-names" changes? I sent it as RFC since I didn't have the board to test 2 lane mode with $patch. And just now I got a board to test x2 and I found a problem with the 2nd patch. .b1co_mode_sel_mask = GENMASK(2, 3), in the patch should be replaced with .b1co_mode_sel_mask = GENMASK(3, 2). I'll resend the patch fixing the above. Thanks Kishon ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support 2015-10-09 23:16 ` Kishon Vijay Abraham I @ 2015-10-09 23:18 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-10-09 23:18 UTC (permalink / raw) To: Bjorn Helgaas Cc: bhelgaas, linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, Arnd Bergmann, Rob Herring Hi, On Saturday 10 October 2015 04:46 AM, Kishon Vijay Abraham I wrote: > Hi Bjorn, > > On Saturday 10 October 2015 04:20 AM, Bjorn Helgaas wrote: >> [+cc Arnd, Rob] >> >> On Mon, Sep 28, 2015 at 06:27:36PM +0530, Kishon Vijay Abraham I wrote: >>> Add driver modifications in pci-dra7xx to get x2 mode working in >>> DRA72 and DRA74. Certain modifications is needed in PHY driver also >>> which I'll send as a separate series. >>> >>> Kishon Vijay Abraham I (2): >>> pci: host: pci-dra7xx: use "num-lanes" property to find phy count >>> pci: host: pci-dra7xx: Enable x2 mode support >> >> Applied to pci/host-dra7xx for v4.4, thanks! >> >> I adjusted the subject line capitalization & format to match the history. >> >> Arnd, Rob, any comments on the DT updates or the "num-lanes" vs number of >> strings in "phy-names" changes? > > I sent it as RFC since I didn't have the board to test 2 lane mode with > $patch. And just now I got a board to test x2 and I found a problem with > the 2nd patch. > > .b1co_mode_sel_mask = GENMASK(2, 3), in the patch should be replaced with > .b1co_mode_sel_mask = GENMASK(3, 2). > > I'll resend the patch fixing the above. I'll resend after a couple of days to fix any comments from Arnd or Rob. Thanks Kishon > > Thanks > Kishon > -- > To unsubscribe from this list: send the line "unsubscribe linux-pci" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support @ 2015-10-09 23:18 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 12+ messages in thread From: Kishon Vijay Abraham I @ 2015-10-09 23:18 UTC (permalink / raw) To: Bjorn Helgaas Cc: bhelgaas, linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, Arnd Bergmann, Rob Herring Hi, On Saturday 10 October 2015 04:46 AM, Kishon Vijay Abraham I wrote: > Hi Bjorn, > > On Saturday 10 October 2015 04:20 AM, Bjorn Helgaas wrote: >> [+cc Arnd, Rob] >> >> On Mon, Sep 28, 2015 at 06:27:36PM +0530, Kishon Vijay Abraham I wrote: >>> Add driver modifications in pci-dra7xx to get x2 mode working in >>> DRA72 and DRA74. Certain modifications is needed in PHY driver also >>> which I'll send as a separate series. >>> >>> Kishon Vijay Abraham I (2): >>> pci: host: pci-dra7xx: use "num-lanes" property to find phy count >>> pci: host: pci-dra7xx: Enable x2 mode support >> >> Applied to pci/host-dra7xx for v4.4, thanks! >> >> I adjusted the subject line capitalization & format to match the history. >> >> Arnd, Rob, any comments on the DT updates or the "num-lanes" vs number of >> strings in "phy-names" changes? > > I sent it as RFC since I didn't have the board to test 2 lane mode with > $patch. And just now I got a board to test x2 and I found a problem with > the 2nd patch. > > .b1co_mode_sel_mask = GENMASK(2, 3), in the patch should be replaced with > .b1co_mode_sel_mask = GENMASK(3, 2). > > I'll resend the patch fixing the above. I'll resend after a couple of days to fix any comments from Arnd or Rob. Thanks Kishon > > Thanks > Kishon > -- > To unsubscribe from this list: send the line "unsubscribe linux-pci" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support 2015-10-09 23:16 ` Kishon Vijay Abraham I (?) (?) @ 2015-10-09 23:53 ` Bjorn Helgaas -1 siblings, 0 replies; 12+ messages in thread From: Bjorn Helgaas @ 2015-10-09 23:53 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: bhelgaas, linux-omap, linux-pci, devicetree, linux-kernel, nsekhar, Arnd Bergmann, Rob Herring On Sat, Oct 10, 2015 at 04:46:55AM +0530, Kishon Vijay Abraham I wrote: > Hi Bjorn, > > On Saturday 10 October 2015 04:20 AM, Bjorn Helgaas wrote: > > [+cc Arnd, Rob] > > > > On Mon, Sep 28, 2015 at 06:27:36PM +0530, Kishon Vijay Abraham I wrote: > >> Add driver modifications in pci-dra7xx to get x2 mode working in > >> DRA72 and DRA74. Certain modifications is needed in PHY driver also > >> which I'll send as a separate series. > >> > >> Kishon Vijay Abraham I (2): > >> pci: host: pci-dra7xx: use "num-lanes" property to find phy count > >> pci: host: pci-dra7xx: Enable x2 mode support > > > > Applied to pci/host-dra7xx for v4.4, thanks! > > > > I adjusted the subject line capitalization & format to match the history. > > > > Arnd, Rob, any comments on the DT updates or the "num-lanes" vs number of > > strings in "phy-names" changes? > > I sent it as RFC since I didn't have the board to test 2 lane mode with > $patch. And just now I got a board to test x2 and I found a problem with > the 2nd patch. > > .b1co_mode_sel_mask = GENMASK(2, 3), in the patch should be replaced with > .b1co_mode_sel_mask = GENMASK(3, 2). > > I'll resend the patch fixing the above. OK, I dropped these two patches. Thanks for letting me know. ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2015-10-09 23:53 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-09-28 12:57 [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support Kishon Vijay Abraham I 2015-09-28 12:57 ` Kishon Vijay Abraham I 2015-09-28 12:57 ` [RFC PATCH 1/2] pci: host: pci-dra7xx: use "num-lanes" property to find phy count Kishon Vijay Abraham I 2015-09-28 12:57 ` Kishon Vijay Abraham I 2015-09-28 12:57 ` [RFC PATCH 2/2] pci: host: pci-dra7xx: Enable x2 mode support Kishon Vijay Abraham I 2015-09-28 12:57 ` Kishon Vijay Abraham I 2015-10-09 22:50 ` [RFC PATCH 0/2] DRA72/DRA74: Add 2 lane support Bjorn Helgaas 2015-10-09 23:16 ` Kishon Vijay Abraham I 2015-10-09 23:16 ` Kishon Vijay Abraham I 2015-10-09 23:18 ` Kishon Vijay Abraham I 2015-10-09 23:18 ` Kishon Vijay Abraham I 2015-10-09 23:53 ` Bjorn Helgaas
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