* [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
@ 2015-10-17 22:08 ` Adam Sampson
0 siblings, 0 replies; 6+ messages in thread
From: Adam Sampson @ 2015-10-17 22:08 UTC (permalink / raw)
To: linux-arm-kernel
The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
bus (it's not switchable), and the OTG port's ID pin is connected to PH4
on the A20.
Tested successfully in both host and device modes.
Signed-off-by: Adam Sampson <ats@offog.org>
---
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index beac431..1757a6a 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -142,6 +142,10 @@
status = "okay";
};
+&otg_sram {
+ status = "okay";
+};
+
&pio {
ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin at 0 {
allwinner,pins = "PH2";
@@ -157,6 +161,13 @@
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+ usb0_id_detect_pin: usb0_id_detect_pin at 0 {
+ allwinner,pins = "PH4";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ };
+
usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin at 0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_out";
@@ -211,7 +222,15 @@
status = "okay";
};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&usbphy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_id_detect_pin>;
+ usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
usb1_vbus-supply = <®_usb1_vbus>;
usb2_vbus-supply = <®_usb1_vbus>;
status = "okay";
--
2.1.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
@ 2015-10-17 22:08 ` Adam Sampson
0 siblings, 0 replies; 6+ messages in thread
From: Adam Sampson @ 2015-10-17 22:08 UTC (permalink / raw)
To: Maxime Ripard
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Adam Sampson
The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
bus (it's not switchable), and the OTG port's ID pin is connected to PH4
on the A20.
Tested successfully in both host and device modes.
Signed-off-by: Adam Sampson <ats-G+91BasbrijYtjvyW6yDsg@public.gmane.org>
---
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index beac431..1757a6a 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -142,6 +142,10 @@
status = "okay";
};
+&otg_sram {
+ status = "okay";
+};
+
&pio {
ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 {
allwinner,pins = "PH2";
@@ -157,6 +161,13 @@
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+ usb0_id_detect_pin: usb0_id_detect_pin@0 {
+ allwinner,pins = "PH4";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ };
+
usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_out";
@@ -211,7 +222,15 @@
status = "okay";
};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&usbphy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_id_detect_pin>;
+ usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
usb1_vbus-supply = <®_usb1_vbus>;
usb2_vbus-supply = <®_usb1_vbus>;
status = "okay";
--
2.1.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* [linux-sunxi] [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
@ 2015-10-18 12:17 ` Hans de Goede
0 siblings, 0 replies; 6+ messages in thread
From: Hans de Goede @ 2015-10-18 12:17 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 10/18/2015 12:08 AM, Adam Sampson wrote:
> The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
> pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
> bus (it's not switchable), and the OTG port's ID pin is connected to PH4
> on the A20.
>
> Tested successfully in both host and device modes.
>
> Signed-off-by: Adam Sampson <ats@offog.org>
Looks good: Acked-by: Hans de Goede <hdegoede@redhat.com>
Regards,
Hans
> ---
> arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> index beac431..1757a6a 100644
> --- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> @@ -142,6 +142,10 @@
> status = "okay";
> };
>
> +&otg_sram {
> + status = "okay";
> +};
> +
> &pio {
> ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin at 0 {
> allwinner,pins = "PH2";
> @@ -157,6 +161,13 @@
> allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> };
>
> + usb0_id_detect_pin: usb0_id_detect_pin at 0 {
> + allwinner,pins = "PH4";
> + allwinner,function = "gpio_in";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
> + };
> +
> usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin at 0 {
> allwinner,pins = "PD2";
> allwinner,function = "gpio_out";
> @@ -211,7 +222,15 @@
> status = "okay";
> };
>
> +&usb_otg {
> + dr_mode = "otg";
> + status = "okay";
> +};
> +
> &usbphy {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb0_id_detect_pin>;
> + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
> usb1_vbus-supply = <®_usb1_vbus>;
> usb2_vbus-supply = <®_usb1_vbus>;
> status = "okay";
>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
@ 2015-10-18 12:17 ` Hans de Goede
0 siblings, 0 replies; 6+ messages in thread
From: Hans de Goede @ 2015-10-18 12:17 UTC (permalink / raw)
To: ats-G+91BasbrijYtjvyW6yDsg, Maxime Ripard
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
Hi,
On 10/18/2015 12:08 AM, Adam Sampson wrote:
> The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
> pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
> bus (it's not switchable), and the OTG port's ID pin is connected to PH4
> on the A20.
>
> Tested successfully in both host and device modes.
>
> Signed-off-by: Adam Sampson <ats-G+91BasbrijYtjvyW6yDsg@public.gmane.org>
Looks good: Acked-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Regards,
Hans
> ---
> arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> index beac431..1757a6a 100644
> --- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
> @@ -142,6 +142,10 @@
> status = "okay";
> };
>
> +&otg_sram {
> + status = "okay";
> +};
> +
> &pio {
> ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 {
> allwinner,pins = "PH2";
> @@ -157,6 +161,13 @@
> allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> };
>
> + usb0_id_detect_pin: usb0_id_detect_pin@0 {
> + allwinner,pins = "PH4";
> + allwinner,function = "gpio_in";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
> + };
> +
> usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {
> allwinner,pins = "PD2";
> allwinner,function = "gpio_out";
> @@ -211,7 +222,15 @@
> status = "okay";
> };
>
> +&usb_otg {
> + dr_mode = "otg";
> + status = "okay";
> +};
> +
> &usbphy {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb0_id_detect_pin>;
> + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
> usb1_vbus-supply = <®_usb1_vbus>;
> usb2_vbus-supply = <®_usb1_vbus>;
> status = "okay";
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
@ 2015-10-19 18:05 ` Maxime Ripard
0 siblings, 0 replies; 6+ messages in thread
From: Maxime Ripard @ 2015-10-19 18:05 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Oct 17, 2015 at 11:08:29PM +0100, Adam Sampson wrote:
> The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
> pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
> bus (it's not switchable), and the OTG port's ID pin is connected to PH4
> on the A20.
>
> Tested successfully in both host and device modes.
>
> Signed-off-by: Adam Sampson <ats@offog.org>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
@ 2015-10-19 18:05 ` Maxime Ripard
0 siblings, 0 replies; 6+ messages in thread
From: Maxime Ripard @ 2015-10-19 18:05 UTC (permalink / raw)
To: Adam Sampson
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
[-- Attachment #1: Type: text/plain, Size: 565 bytes --]
On Sat, Oct 17, 2015 at 11:08:29PM +0100, Adam Sampson wrote:
> The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
> pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
> bus (it's not switchable), and the OTG port's ID pin is connected to PH4
> on the A20.
>
> Tested successfully in both host and device modes.
>
> Signed-off-by: Adam Sampson <ats-G+91BasbrijYtjvyW6yDsg@public.gmane.org>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-10-19 18:05 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-17 22:08 [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano Adam Sampson
2015-10-17 22:08 ` Adam Sampson
2015-10-18 12:17 ` [linux-sunxi] " Hans de Goede
2015-10-18 12:17 ` Hans de Goede
2015-10-19 18:05 ` Maxime Ripard
2015-10-19 18:05 ` Maxime Ripard
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