From: Caesar Wang <caesar.upstream@gmail.com>
To: Doug Anderson <dianders@chromium.org>
Cc: Caesar Wang <wxt@rock-chips.com>,
Heiko Stuebner <heiko@sntech.de>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
Dmitry Torokhov <dmitry.torokhov@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Eduardo Valentin <edubezval@gmail.com>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
Zhang Rui <rui.zhang@intel.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state
Date: Wed, 21 Oct 2015 10:16:55 +0800 [thread overview]
Message-ID: <5626F597.8060601@gmail.com> (raw)
In-Reply-To: <CAD=FV=UNyjJmN4TtZ+1DOeM_OYikRAUhYsN=F_f-q5MA_MVFag@mail.gmail.com>
Doug,
在 2015年10月21日 10:14, Doug Anderson 写道:
> Caesar,
>
> On Tue, Oct 20, 2015 at 6:47 PM, Caesar Wang <caesar.upstream@gmail.com> wrote:
>> Doug,
>>
>> 在 2015年10月21日 00:01, Doug Anderson 写道:
>>
>> Caesar,
>>
>> On Tue, Oct 20, 2015 at 2:11 AM, Caesar Wang <wxt@rock-chips.com> wrote:
>>
>> As the TRM says, the TSHUT default state is high active.
>> In general, the TSHUT state can get from the dts. Otherwise
>> it gets the state from this.
>>
>> Can you point at where the TRM says that the default state is high active?
>>
>> With the manual I have, I look at TSADC_AUTO_CON and I look at the
>> description of "Bit 8". It says that "tshut polarity" is 0 for low
>> active and 1 for high active. It then said that the Reset Value is 0.
>>
>> ...the "Reset Value" in tables like this is notoriously unreliable, so
>> I can totally believe that it's wrong. If you can point me at the
>> part of the TRM that says that TSHUT is high active by default then I
>> can confirm that for you. ;)
>>
>>
>> Okay, I know that's my wrong, the polarity is high or low can be selected.
>> :-(
>>
>> I remember the veyron why is the default HiGH active, since the opt is
>> connected to the PMIC.(we need think about the devices)
>>
>> Why is the evb board LOW active, since the opt didn't connected to the
>> devices. TSHUT is depend on the CRU to work.
> I think we can drop this patch then, right? Any boards that need a
> change from the default can just set "rockchip,hw-tshut-polarity",
> right?
Yep, we should drop this patch.
I'm ready resend the patchs.
> -Doug
>
--
Thanks,
Caesar
WARNING: multiple messages have this Message-ID (diff)
From: caesar.upstream@gmail.com (Caesar Wang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] thermal: rockchip: change the TSHUT default state
Date: Wed, 21 Oct 2015 10:16:55 +0800 [thread overview]
Message-ID: <5626F597.8060601@gmail.com> (raw)
In-Reply-To: <CAD=FV=UNyjJmN4TtZ+1DOeM_OYikRAUhYsN=F_f-q5MA_MVFag@mail.gmail.com>
Doug,
? 2015?10?21? 10:14, Doug Anderson ??:
> Caesar,
>
> On Tue, Oct 20, 2015 at 6:47 PM, Caesar Wang <caesar.upstream@gmail.com> wrote:
>> Doug,
>>
>> ? 2015?10?21? 00:01, Doug Anderson ??:
>>
>> Caesar,
>>
>> On Tue, Oct 20, 2015 at 2:11 AM, Caesar Wang <wxt@rock-chips.com> wrote:
>>
>> As the TRM says, the TSHUT default state is high active.
>> In general, the TSHUT state can get from the dts. Otherwise
>> it gets the state from this.
>>
>> Can you point at where the TRM says that the default state is high active?
>>
>> With the manual I have, I look at TSADC_AUTO_CON and I look at the
>> description of "Bit 8". It says that "tshut polarity" is 0 for low
>> active and 1 for high active. It then said that the Reset Value is 0.
>>
>> ...the "Reset Value" in tables like this is notoriously unreliable, so
>> I can totally believe that it's wrong. If you can point me at the
>> part of the TRM that says that TSHUT is high active by default then I
>> can confirm that for you. ;)
>>
>>
>> Okay, I know that's my wrong, the polarity is high or low can be selected.
>> :-(
>>
>> I remember the veyron why is the default HiGH active, since the opt is
>> connected to the PMIC.(we need think about the devices)
>>
>> Why is the evb board LOW active, since the opt didn't connected to the
>> devices. TSHUT is depend on the CRU to work.
> I think we can drop this patch then, right? Any boards that need a
> change from the default can just set "rockchip,hw-tshut-polarity",
> right?
Yep, we should drop this patch.
I'm ready resend the patchs.
> -Doug
>
--
Thanks,
Caesar
next prev parent reply other threads:[~2015-10-21 2:17 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-20 9:11 [PATCH 0/4] Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 9:11 ` [PATCH 1/4] dt-bindings: Sync the dts to this document Caesar Wang
2015-10-20 9:11 ` Caesar Wang
[not found] ` <1445332264-6054-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-10-20 9:11 ` [PATCH 2/4] thermal: rockchip: ensure the otp state before resetting the controller Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 15:52 ` Doug Anderson
2015-10-20 15:52 ` Doug Anderson
2015-10-21 1:41 ` Caesar Wang
2015-10-21 1:41 ` Caesar Wang
2015-10-27 10:23 ` Linus Walleij
2015-10-27 10:23 ` Linus Walleij
2015-10-20 9:11 ` [PATCH 4/4] ARM: dts: rockchip: Add the OTP gpio pinctrl Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 9:11 ` [PATCH 3/4] thermal: rockchip: change the TSHUT default state Caesar Wang
2015-10-20 9:11 ` Caesar Wang
2015-10-20 16:01 ` Doug Anderson
2015-10-20 16:01 ` Doug Anderson
[not found] ` <5626EEB2.50101@gmail.com>
2015-10-21 2:14 ` Doug Anderson
2015-10-21 2:14 ` Doug Anderson
2015-10-21 2:16 ` Caesar Wang [this message]
2015-10-21 2:16 ` Caesar Wang
2015-10-20 9:15 ` [PATCH 0/4] Add the OTP gpio pinctrl to fix the TSHUT issue Caesar Wang
2015-10-20 9:15 ` Caesar Wang
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