Re: [2/2] mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode

[Alim Akhtar <alim.akhtar@samsung.com>]

Hi Jaehoon,

On 10/21/2015 04:19 PM, Jaehoon Chung wrote:
> When card is running with DDR mode, dwmmc needs to set DDR_REG bit at
> UHS_REG register.
> Before this patch, dwmmc controller doesn't consider this.
> If this patch is not applied, CRC or other error shoulds be occurred.
> 
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> 
Looks good to me,
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested on peach board with some additional dt changes, works well.
so, Tested-by: Alim Akhtar <alim.akhtar@samsung.com>

> ---
> drivers/mmc/host/dw_mmc.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 6e600e8..cb31e8e 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -1295,6 +1295,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
>   
>   	/* DDR mode set */
>   	if (ios->timing == MMC_TIMING_MMC_DDR52 ||
> +	    ios->timing == MMC_TIMING_UHS_DDR50 ||
>   	    ios->timing == MMC_TIMING_MMC_HS400)
>   		regs |= ((0x1 << slot->id) << 16);
>   	else
>