diff for duplicates of <562A1070.8070505@gmail.com> diff --git a/a/1.txt b/N1/1.txt index c111c31..6b7e9ff 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -92,22 +92,22 @@ On 20/10/15 08:34, Erin Lo wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu@0 { +> + cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x0>; > + }; -> + cpu@1 { +> + cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x1>; > + }; -> + cpu@2 { +> + cpu at 2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x2>; > + }; -> + cpu@3 { +> + cpu at 3 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x3>; @@ -141,13 +141,13 @@ On 20/10/15 08:34, Erin Lo wrote: > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; > + }; > + -> + watchdog: watchdog@10007000 { +> + watchdog: watchdog at 10007000 { > + compatible = "mediatek,mt2701-wdt", > + "mediatek,mt6589-wdt"; > + reg = <0 0x10007000 0 0x100>; > + }; > + -> + timer: timer@10008000 { +> + timer: timer at 10008000 { > + compatible = "mediatek,mt2701-timer", > + "mediatek,mt6577-timer"; > + reg = <0x10008000 0x80>; @@ -163,7 +163,7 @@ Please let me know if this is not working, I have no hardware to test it. > + clock-names = "system-clk", "rtc-clk"; > + }; > + -> + sysirq: interrupt-controller@10200100 { +> + sysirq: interrupt-controller at 10200100 { > + compatible = "mediatek,mt2701-sysirq", > + "mediatek,mt6577-sysirq"; > + interrupt-controller; @@ -172,7 +172,7 @@ Please let me know if this is not working, I have no hardware to test it. > + reg = <0 0x10200100 0 0x1c>; > + }; > + -> + gic: interrupt-controller@10211000 { +> + gic: interrupt-controller at 10211000 { > + compatible = "arm,cortex-a7-gic"; > + interrupt-controller; > + #interrupt-cells = <3>; @@ -183,7 +183,7 @@ Please let me know if this is not working, I have no hardware to test it. > + <0 0x10216000 0 0x2000>; > + }; > + -> + uart0: serial@11002000 { +> + uart0: serial at 11002000 { > + compatible = "mediatek,mt2701-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11002000 0 0x400>; @@ -192,7 +192,7 @@ Please let me know if this is not working, I have no hardware to test it. > + status = "disabled"; > + }; > + -> + uart1: serial@11003000 { +> + uart1: serial at 11003000 { > + compatible = "mediatek,mt2701-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11003000 0 0x400>; @@ -201,7 +201,7 @@ Please let me know if this is not working, I have no hardware to test it. > + status = "disabled"; > + }; > + -> + uart2: serial@11004000 { +> + uart2: serial at 11004000 { > + compatible = "mediatek,mt2701-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11004000 0 0x400>; @@ -210,7 +210,7 @@ Please let me know if this is not working, I have no hardware to test it. > + status = "disabled"; > + }; > + -> + uart3: serial@11005000 { +> + uart3: serial at 11005000 { > + compatible = "mediatek,mt2701-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11005000 0 0x400>; diff --git a/a/content_digest b/N1/content_digest index 776e611..921a167 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,9 @@ "ref\01445322871-14134-1-git-send-email-erin.lo@mediatek.com\0" "ref\01445322871-14134-3-git-send-email-erin.lo@mediatek.com\0" - "From\0Matthias Brugger <matthias.bgg@gmail.com>\0" - "Subject\0Re: [PATCH v3 2/2] ARM: dts: mediatek: add MT2701 basic support\0" + "From\0matthias.bgg@gmail.com (Matthias Brugger)\0" + "Subject\0[PATCH v3 2/2] ARM: dts: mediatek: add MT2701 basic support\0" "Date\0Fri, 23 Oct 2015 12:48:16 +0200\0" - "To\0Erin Lo <erin.lo@mediatek.com>\0" - "Cc\0Rob Herring <robh+dt@kernel.org>" - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - Russell King <linux@arm.linux.org.uk> - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-mediatek@lists.infradead.org - " srv_heupstream@mediatek.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "\n" @@ -111,22 +100,22 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu@0 {\n" + "> +\t\tcpu at 0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\treg = <0x0>;\n" "> +\t\t};\n" - "> +\t\tcpu@1 {\n" + "> +\t\tcpu at 1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\treg = <0x1>;\n" "> +\t\t};\n" - "> +\t\tcpu@2 {\n" + "> +\t\tcpu at 2 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\treg = <0x2>;\n" "> +\t\t};\n" - "> +\t\tcpu@3 {\n" + "> +\t\tcpu at 3 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\treg = <0x3>;\n" @@ -160,13 +149,13 @@ "> +\t\t\t <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;\n" "> +\t};\n" "> +\n" - "> +\twatchdog: watchdog@10007000 {\n" + "> +\twatchdog: watchdog at 10007000 {\n" "> +\t\tcompatible = \"mediatek,mt2701-wdt\",\n" "> +\t\t\t \"mediatek,mt6589-wdt\";\n" "> +\t\treg = <0 0x10007000 0 0x100>;\n" "> +\t};\n" "> +\n" - "> +\ttimer: timer@10008000 {\n" + "> +\ttimer: timer at 10008000 {\n" "> +\t\tcompatible = \"mediatek,mt2701-timer\",\n" "> +\t\t\t \"mediatek,mt6577-timer\";\n" "> +\t\treg = <0x10008000 0x80>;\n" @@ -182,7 +171,7 @@ "> +\t\tclock-names = \"system-clk\", \"rtc-clk\";\n" "> +\t};\n" "> +\n" - "> +\tsysirq: interrupt-controller@10200100 {\n" + "> +\tsysirq: interrupt-controller at 10200100 {\n" "> +\t\tcompatible = \"mediatek,mt2701-sysirq\",\n" "> +\t\t\t \"mediatek,mt6577-sysirq\";\n" "> +\t\tinterrupt-controller;\n" @@ -191,7 +180,7 @@ "> +\t\treg = <0 0x10200100 0 0x1c>;\n" "> +\t};\n" "> +\n" - "> +\tgic: interrupt-controller@10211000 {\n" + "> +\tgic: interrupt-controller at 10211000 {\n" "> +\t\tcompatible = \"arm,cortex-a7-gic\";\n" "> +\t\tinterrupt-controller;\n" "> +\t\t#interrupt-cells = <3>;\n" @@ -202,7 +191,7 @@ "> +\t\t <0 0x10216000 0 0x2000>;\n" "> +\t};\n" "> +\n" - "> +\tuart0: serial@11002000 {\n" + "> +\tuart0: serial at 11002000 {\n" "> +\t\tcompatible = \"mediatek,mt2701-uart\",\n" "> +\t\t\t \"mediatek,mt6577-uart\";\n" "> +\t\treg = <0 0x11002000 0 0x400>;\n" @@ -211,7 +200,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tuart1: serial@11003000 {\n" + "> +\tuart1: serial at 11003000 {\n" "> +\t\tcompatible = \"mediatek,mt2701-uart\",\n" "> +\t\t\t \"mediatek,mt6577-uart\";\n" "> +\t\treg = <0 0x11003000 0 0x400>;\n" @@ -220,7 +209,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tuart2: serial@11004000 {\n" + "> +\tuart2: serial at 11004000 {\n" "> +\t\tcompatible = \"mediatek,mt2701-uart\",\n" "> +\t\t\t \"mediatek,mt6577-uart\";\n" "> +\t\treg = <0 0x11004000 0 0x400>;\n" @@ -229,7 +218,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tuart3: serial@11005000 {\n" + "> +\tuart3: serial at 11005000 {\n" "> +\t\tcompatible = \"mediatek,mt2701-uart\",\n" "> +\t\t\t \"mediatek,mt6577-uart\";\n" "> +\t\treg = <0 0x11005000 0 0x400>;\n" @@ -252,4 +241,4 @@ "> \t\"mediatek,mt8127\",\n" > -37280cef266b628ceb2169a8f69fcc4e58d93a5ae894775e17f1aedf493f7a27 +7340580c02ddc6c437df1ac1ddf5d22984404c40f5f7bab21570fea963a02596
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