From: Suzuki.Poulose@arm.com (Suzuki K. Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 3/4] arm-cci: Add routines to enable/disable all counters
Date: Thu, 5 Nov 2015 17:52:37 +0000 [thread overview]
Message-ID: <563B9765.9070708@arm.com> (raw)
In-Reply-To: <20151105172756.GH32247@leverpostej>
On 05/11/15 17:27, Mark Rutland wrote:
>>> Can we not get rid of the mask entirely? The combination of used_mask
>>> and each event's hwc->state tells us which counters are actually in use.
>>
>> The problem is that neither hwc->state nor the cci_pmu->hw_events->events is
>> protected by pmu_lock, while enable/disable counter is. So we cannot really
>> rely on ((struct perf_event *)(cci_pmu->hw_events->events[counter]))->hw->state.
>
> They must be protected somehow, or we'd have races against cross-calls
> and/or the interrupt handler.
>
> Are we protected due to being cpu-affine with interrupts disabled when
> modifying these, is there some other mechanism that protects us, or do
> we have additional problems here?
>
Each perf_event is allocated a counter id atomically using the bit mask. So,
once the id is allocated nobody messes with that id from the PMU side. And,
the hw->state may have its own protection within the generic perf layer(which
I haven't checked).
Thanks
Suzuki
WARNING: multiple messages have this Message-ID (diff)
From: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, punit.agrawal@arm.com,
arm@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv2 3/4] arm-cci: Add routines to enable/disable all counters
Date: Thu, 5 Nov 2015 17:52:37 +0000 [thread overview]
Message-ID: <563B9765.9070708@arm.com> (raw)
In-Reply-To: <20151105172756.GH32247@leverpostej>
On 05/11/15 17:27, Mark Rutland wrote:
>>> Can we not get rid of the mask entirely? The combination of used_mask
>>> and each event's hwc->state tells us which counters are actually in use.
>>
>> The problem is that neither hwc->state nor the cci_pmu->hw_events->events is
>> protected by pmu_lock, while enable/disable counter is. So we cannot really
>> rely on ((struct perf_event *)(cci_pmu->hw_events->events[counter]))->hw->state.
>
> They must be protected somehow, or we'd have races against cross-calls
> and/or the interrupt handler.
>
> Are we protected due to being cpu-affine with interrupts disabled when
> modifying these, is there some other mechanism that protects us, or do
> we have additional problems here?
>
Each perf_event is allocated a counter id atomically using the bit mask. So,
once the id is allocated nobody messes with that id from the PMU side. And,
the hw->state may have its own protection within the generic perf layer(which
I haven't checked).
Thanks
Suzuki
next prev parent reply other threads:[~2015-11-05 17:52 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-20 13:05 [PATCHv2 0/4] arm-cci500: Workaround pmu_event_set_period Suzuki K. Poulose
2015-10-20 13:05 ` Suzuki K. Poulose
2015-10-20 13:05 ` [PATCHv2 1/4] arm-cci: Refactor CCI PMU code Suzuki K. Poulose
2015-10-20 13:05 ` Suzuki K. Poulose
2015-11-04 18:01 ` Mark Rutland
2015-11-04 18:01 ` Mark Rutland
2015-11-04 18:17 ` Suzuki K. Poulose
2015-11-04 18:17 ` Suzuki K. Poulose
2015-10-20 13:05 ` [PATCHv2 2/4] arm-cci: Get the status of a counter Suzuki K. Poulose
2015-10-20 13:05 ` Suzuki K. Poulose
2015-11-04 18:06 ` Mark Rutland
2015-11-04 18:06 ` Mark Rutland
2015-11-04 18:20 ` Suzuki K. Poulose
2015-11-04 18:20 ` Suzuki K. Poulose
2015-10-20 13:05 ` [PATCHv2 3/4] arm-cci: Add routines to enable/disable all counters Suzuki K. Poulose
2015-10-20 13:05 ` Suzuki K. Poulose
2015-11-04 18:28 ` Mark Rutland
2015-11-04 18:28 ` Mark Rutland
2015-11-05 10:14 ` Suzuki K. Poulose
2015-11-05 10:14 ` Suzuki K. Poulose
2015-11-05 10:19 ` Suzuki K. Poulose
2015-11-05 10:19 ` Suzuki K. Poulose
2015-11-05 17:27 ` Mark Rutland
2015-11-05 17:27 ` Mark Rutland
2015-11-05 17:52 ` Suzuki K. Poulose [this message]
2015-11-05 17:52 ` Suzuki K. Poulose
2015-10-20 13:05 ` [PATCHv2 4/4] arm-cci500: Work around PMU counter writes Suzuki K. Poulose
2015-10-20 13:05 ` Suzuki K. Poulose
2015-10-22 17:00 ` [PATCHv2 0/4] arm-cci500: Workaround pmu_event_set_period Olof Johansson
2015-10-22 17:00 ` Olof Johansson
2015-10-22 21:46 ` Suzuki K. Poulose
2015-10-22 21:46 ` Suzuki K. Poulose
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