From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 2/4] irqchip: add platform device driver for mbigen device
Date: Thu, 19 Nov 2015 08:48:12 +0000 [thread overview]
Message-ID: <564D8CCC.1070707@arm.com> (raw)
In-Reply-To: <1446798522-28000-3-git-send-email-majun258@huawei.com>
On 06/11/15 08:28, MaJun wrote:
> From: Ma Jun <majun258@huawei.com>
>
> Mbigen means Message Based Interrupt Generator(MBIGEN).
>
> Its a kind of interrupt controller that collects
> the interrupts from external devices and generate msi interrupt.
> Mbigen is applied to reduce the number of wire connected interrupts.
>
> As the peripherals increasing, the interrupts lines needed is
> increasing much, especially on the Arm64 server SOC.
>
> Therefore, the interrupt pin in GIC is not enough to cover so
> many peripherals.
>
> Mbigen is designed to fix this problem.
>
> Mbigen chip locates in ITS or outside of ITS.
>
> Mbigen chip hardware structure shows as below:
>
> mbigen chip
> |---------------------|-------------------|
> mgn_node0 mgn_node1 mgn_node2
> | |-------| |-------|------|
> dev1 dev1 dev2 dev1 dev3 dev4
>
> Each mbigen chip contains several mbigen nodes.
>
> External devices can connect to mbigen node through wire connecting way.
>
> Because a mbigen node only can support 128 interrupt maximum, depends
> on the interrupt lines number of devices, a device can connects to one
> more mbigen nodes.
>
> Also, several different devices can connect to a same mbigen node.
>
> When devices triggered interrupt,mbigen chip detects and collects
> the interrupts and generates the MBI interrupts by writing the ITS
> Translator register.
>
> To simplify mbigen driver,I used a new conception--mbigen device.
> Each mbigen device is initialized as a platform device.
>
> Mbigen device presents the parts(register, pin definition etc.) in
> mbigen chip corresponding to a peripheral device.
>
> So from software view, the structure likes below
>
> mbigen chip
> |---------------------|-----------------|
> mbigen device1 mbigen device2 mbigen device3
> | | |
> dev1 dev2 dev3
>
> Signed-off-by: Ma Jun <majun258@huawei.com>
> ---
> drivers/irqchip/Kconfig | 8 ++++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-mbigen.c | 73 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 82 insertions(+), 0 deletions(-)
> create mode 100644 drivers/irqchip/irq-mbigen.c
>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 4d7294e..b205e15 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -27,6 +27,14 @@ config ARM_GIC_V3_ITS
> bool
> select PCI_MSI_IRQ_DOMAIN
>
> +config HISILICON_IRQ_MBIGEN
> + bool "Support mbigen interrupt controller"
> + default n
> + depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN
> + help
> + Enable the mbigen interrupt controller used on
> + Hisilicon platform.
> +
> config ARM_NVIC
> bool
> select IRQ_DOMAIN
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 177f78f..cd76b11 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -24,6 +24,7 @@ obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
> obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
> obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
> obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o
> +obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
> obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
> obj-$(CONFIG_ARM_VIC) += irq-vic.o
> obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
> diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
> new file mode 100644
> index 0000000..25e4000
> --- /dev/null
> +++ b/drivers/irqchip/irq-mbigen.c
> @@ -0,0 +1,73 @@
> +/*
> + * Copyright (C) 2015 Hisilicon Limited, All Rights Reserved.
> + * Author: Jun Ma <majun258@huawei.com>
> + * Author: Yun Wu <wuyun.wu@huawei.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +/**
> + * struct mbigen_device - holds the information of mbigen device.
> + *
> + * @pdev: pointer to the platform device structure of mbigen chip.
> + * @base: mapped address of this mbigen chip.
> + */
> +struct mbigen_device {
> + struct platform_device *pdev;
> + void __iomem *base;
> +};
> +
> +static int mbigen_device_probe(struct platform_device *pdev)
> +{
> + struct mbigen_device *mgn_chip;
> +
> + mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);
> + if (!mgn_chip)
> + return -ENOMEM;
> +
> + mgn_chip->pdev = pdev;
> + mgn_chip->base = of_iomap(pdev->dev.of_node, 0);
> +
If you're going to use the devm_* stuff for your allocations, you might
as well use devm_ioremap_resource as a matter of consistency. And
checking the return value is not superfluous.
> + platform_set_drvdata(pdev, mgn_chip);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id mbigen_of_match[] = {
> + { .compatible = "hisilicon,mbigen-v2" },
> + { /* END */ }
> +};
> +MODULE_DEVICE_TABLE(of, mbigen_of_match);
> +
> +static struct platform_driver mbigen_platform_driver = {
> + .driver = {
> + .name = "Hisilicon MBIGEN-V2",
> + .owner = THIS_MODULE,
> + .of_match_table = mbigen_of_match,
> + },
> + .probe = mbigen_device_probe,
> +};
> +
> +module_platform_driver(mbigen_platform_driver);
> +
> +MODULE_AUTHOR("Jun Ma <majun258@huawei.com>");
> +MODULE_AUTHOR("Yun Wu <wuyun.wu@huawei.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("Hisilicon MBI Generator driver");
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: MaJun <majun258@huawei.com>,
Catalin.Marinas@arm.com, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Will.Deacon@arm.com,
mark.rutland@arm.com, jason@lakedaemon.net, tglx@linutronix.de,
lizefan@huawei.com, huxinwei@huawei.com, dingtianhong@huawei.com,
zhaojunhua@hisilicon.com, liguozhu@hisilicon.com,
xuwei5@hisilicon.com, wei.chenwei@hisilicon.com,
guohanjun@huawei.com, wuyun.wu@huawei.com, guodong.xu@linaro.org,
haojian.zhuang@linaro.org, zhangfei.gao@linaro.org,
usman.ahmad@linaro.org, klimov.linux@gmail.com,
gabriele.paoloni@huawei.com
Subject: Re: [PATCH v8 2/4] irqchip: add platform device driver for mbigen device
Date: Thu, 19 Nov 2015 08:48:12 +0000 [thread overview]
Message-ID: <564D8CCC.1070707@arm.com> (raw)
In-Reply-To: <1446798522-28000-3-git-send-email-majun258@huawei.com>
On 06/11/15 08:28, MaJun wrote:
> From: Ma Jun <majun258@huawei.com>
>
> Mbigen means Message Based Interrupt Generator(MBIGEN).
>
> Its a kind of interrupt controller that collects
> the interrupts from external devices and generate msi interrupt.
> Mbigen is applied to reduce the number of wire connected interrupts.
>
> As the peripherals increasing, the interrupts lines needed is
> increasing much, especially on the Arm64 server SOC.
>
> Therefore, the interrupt pin in GIC is not enough to cover so
> many peripherals.
>
> Mbigen is designed to fix this problem.
>
> Mbigen chip locates in ITS or outside of ITS.
>
> Mbigen chip hardware structure shows as below:
>
> mbigen chip
> |---------------------|-------------------|
> mgn_node0 mgn_node1 mgn_node2
> | |-------| |-------|------|
> dev1 dev1 dev2 dev1 dev3 dev4
>
> Each mbigen chip contains several mbigen nodes.
>
> External devices can connect to mbigen node through wire connecting way.
>
> Because a mbigen node only can support 128 interrupt maximum, depends
> on the interrupt lines number of devices, a device can connects to one
> more mbigen nodes.
>
> Also, several different devices can connect to a same mbigen node.
>
> When devices triggered interrupt,mbigen chip detects and collects
> the interrupts and generates the MBI interrupts by writing the ITS
> Translator register.
>
> To simplify mbigen driver,I used a new conception--mbigen device.
> Each mbigen device is initialized as a platform device.
>
> Mbigen device presents the parts(register, pin definition etc.) in
> mbigen chip corresponding to a peripheral device.
>
> So from software view, the structure likes below
>
> mbigen chip
> |---------------------|-----------------|
> mbigen device1 mbigen device2 mbigen device3
> | | |
> dev1 dev2 dev3
>
> Signed-off-by: Ma Jun <majun258@huawei.com>
> ---
> drivers/irqchip/Kconfig | 8 ++++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-mbigen.c | 73 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 82 insertions(+), 0 deletions(-)
> create mode 100644 drivers/irqchip/irq-mbigen.c
>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 4d7294e..b205e15 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -27,6 +27,14 @@ config ARM_GIC_V3_ITS
> bool
> select PCI_MSI_IRQ_DOMAIN
>
> +config HISILICON_IRQ_MBIGEN
> + bool "Support mbigen interrupt controller"
> + default n
> + depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN
> + help
> + Enable the mbigen interrupt controller used on
> + Hisilicon platform.
> +
> config ARM_NVIC
> bool
> select IRQ_DOMAIN
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 177f78f..cd76b11 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -24,6 +24,7 @@ obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
> obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
> obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
> obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o
> +obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
> obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
> obj-$(CONFIG_ARM_VIC) += irq-vic.o
> obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
> diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
> new file mode 100644
> index 0000000..25e4000
> --- /dev/null
> +++ b/drivers/irqchip/irq-mbigen.c
> @@ -0,0 +1,73 @@
> +/*
> + * Copyright (C) 2015 Hisilicon Limited, All Rights Reserved.
> + * Author: Jun Ma <majun258@huawei.com>
> + * Author: Yun Wu <wuyun.wu@huawei.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +/**
> + * struct mbigen_device - holds the information of mbigen device.
> + *
> + * @pdev: pointer to the platform device structure of mbigen chip.
> + * @base: mapped address of this mbigen chip.
> + */
> +struct mbigen_device {
> + struct platform_device *pdev;
> + void __iomem *base;
> +};
> +
> +static int mbigen_device_probe(struct platform_device *pdev)
> +{
> + struct mbigen_device *mgn_chip;
> +
> + mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);
> + if (!mgn_chip)
> + return -ENOMEM;
> +
> + mgn_chip->pdev = pdev;
> + mgn_chip->base = of_iomap(pdev->dev.of_node, 0);
> +
If you're going to use the devm_* stuff for your allocations, you might
as well use devm_ioremap_resource as a matter of consistency. And
checking the return value is not superfluous.
> + platform_set_drvdata(pdev, mgn_chip);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id mbigen_of_match[] = {
> + { .compatible = "hisilicon,mbigen-v2" },
> + { /* END */ }
> +};
> +MODULE_DEVICE_TABLE(of, mbigen_of_match);
> +
> +static struct platform_driver mbigen_platform_driver = {
> + .driver = {
> + .name = "Hisilicon MBIGEN-V2",
> + .owner = THIS_MODULE,
> + .of_match_table = mbigen_of_match,
> + },
> + .probe = mbigen_device_probe,
> +};
> +
> +module_platform_driver(mbigen_platform_driver);
> +
> +MODULE_AUTHOR("Jun Ma <majun258@huawei.com>");
> +MODULE_AUTHOR("Yun Wu <wuyun.wu@huawei.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("Hisilicon MBI Generator driver");
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-11-19 8:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-06 8:28 [PATCH v8 0/4] irqchip:support mbigen interrupt controller MaJun
2015-11-06 8:28 ` MaJun
2015-11-06 8:28 ` [PATCH v8 1/4] dt-binding:Documents of the mbigen bindings MaJun
2015-11-06 8:28 ` MaJun
2015-11-18 17:50 ` Marc Zyngier
2015-11-18 17:50 ` Marc Zyngier
2015-11-19 10:53 ` majun (F)
2015-11-19 10:53 ` majun (F)
2015-11-06 8:28 ` [PATCH v8 2/4] irqchip: add platform device driver for mbigen device MaJun
2015-11-06 8:28 ` MaJun
2015-11-19 8:48 ` Marc Zyngier [this message]
2015-11-19 8:48 ` Marc Zyngier
2015-11-06 8:28 ` [PATCH v8 3/4] irqchip:create irq domain for each " MaJun
2015-11-06 8:28 ` MaJun
2015-11-18 19:30 ` Marc Zyngier
2015-11-18 19:30 ` Marc Zyngier
2015-11-06 8:28 ` [PATCH v8 4/4] irqchip:implement the mbigen irq chip operation functions MaJun
2015-11-06 8:28 ` MaJun
2015-11-19 9:41 ` Marc Zyngier
2015-11-19 9:41 ` Marc Zyngier
2015-11-19 10:53 ` majun (F)
2015-11-19 10:53 ` majun (F)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=564D8CCC.1070707@arm.com \
--to=marc.zyngier@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.