* [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
@ 2015-11-20 8:11 ` Thomas Huth
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Huth @ 2015-11-20 8:11 UTC (permalink / raw)
To: kvm-ppc, Paul Mackerras, lvivier; +Cc: kvm, dgibson
In the old DABR register, the BT (Breakpoint Translation) bit
is bit number 61. In the new DAWRX register, the WT (Watchpoint
Translation) bit is bit number 59. So to move the DABR-BT bit
into the position of the DAWRX-WT bit, it has to be shifted by
two, not only by one. This fixes hardware watchpoints in gdb of
older guests that only use the H_SET_DABR/X interface instead
of the new H_SET_MODE interface.
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index b98889e..3983b87 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
/* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
- rlwimi r5, r4, 1, DAWRX_WT
+ rlwimi r5, r4, 2, DAWRX_WT
clrrdi r4, r4, 3
std r4, VCPU_DAWR(r3)
std r5, VCPU_DAWRX(r3)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
2015-11-20 8:11 ` Thomas Huth
@ 2015-11-20 15:42 ` Laurent Vivier
-1 siblings, 0 replies; 10+ messages in thread
From: Laurent Vivier @ 2015-11-20 15:42 UTC (permalink / raw)
To: Thomas Huth, kvm-ppc, Paul Mackerras; +Cc: kvm, dgibson
On 20/11/2015 09:11, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>
> /* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
> 2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
> - rlwimi r5, r4, 1, DAWRX_WT
> + rlwimi r5, r4, 2, DAWRX_WT
> clrrdi r4, r4, 3
> std r4, VCPU_DAWR(r3)
> std r5, VCPU_DAWRX(r3)
>
Nice catch.
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
@ 2015-11-20 15:42 ` Laurent Vivier
0 siblings, 0 replies; 10+ messages in thread
From: Laurent Vivier @ 2015-11-20 15:42 UTC (permalink / raw)
To: Thomas Huth, kvm-ppc, Paul Mackerras; +Cc: kvm, dgibson
On 20/11/2015 09:11, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>
> /* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
> 2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
> - rlwimi r5, r4, 1, DAWRX_WT
> + rlwimi r5, r4, 2, DAWRX_WT
> clrrdi r4, r4, 3
> std r4, VCPU_DAWR(r3)
> std r5, VCPU_DAWRX(r3)
>
Nice catch.
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
2015-11-20 8:11 ` Thomas Huth
@ 2015-11-23 1:35 ` David Gibson
-1 siblings, 0 replies; 10+ messages in thread
From: David Gibson @ 2015-11-23 1:35 UTC (permalink / raw)
To: Thomas Huth; +Cc: kvm-ppc, Paul Mackerras, lvivier, kvm
[-- Attachment #1: Type: text/plain, Size: 1458 bytes --]
On Fri, 20 Nov 2015 09:11:45 +0100
Thomas Huth <thuth@redhat.com> wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: David Gibson <dgibson@redhat.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>
> /* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
> 2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
> - rlwimi r5, r4, 1, DAWRX_WT
> + rlwimi r5, r4, 2, DAWRX_WT
> clrrdi r4, r4, 3
> std r4, VCPU_DAWR(r3)
> std r5, VCPU_DAWRX(r3)
> --
> 1.8.3.1
>
--
David Gibson <dgibson@redhat.com>
Senior Software Engineer, Virtualization, Red Hat
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
@ 2015-11-23 1:35 ` David Gibson
0 siblings, 0 replies; 10+ messages in thread
From: David Gibson @ 2015-11-23 1:35 UTC (permalink / raw)
To: Thomas Huth; +Cc: kvm-ppc, Paul Mackerras, lvivier, kvm
[-- Attachment #1: Type: text/plain, Size: 1458 bytes --]
On Fri, 20 Nov 2015 09:11:45 +0100
Thomas Huth <thuth@redhat.com> wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: David Gibson <dgibson@redhat.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>
> /* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
> 2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
> - rlwimi r5, r4, 1, DAWRX_WT
> + rlwimi r5, r4, 2, DAWRX_WT
> clrrdi r4, r4, 3
> std r4, VCPU_DAWR(r3)
> std r5, VCPU_DAWRX(r3)
> --
> 1.8.3.1
>
--
David Gibson <dgibson@redhat.com>
Senior Software Engineer, Virtualization, Red Hat
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
2015-11-20 8:11 ` Thomas Huth
@ 2015-12-07 12:01 ` Thomas Huth
-1 siblings, 0 replies; 10+ messages in thread
From: Thomas Huth @ 2015-12-07 12:01 UTC (permalink / raw)
To: kvm-ppc, Paul Mackerras; +Cc: kvm
On 20/11/15 09:11, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>
> /* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
> 2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
> - rlwimi r5, r4, 1, DAWRX_WT
> + rlwimi r5, r4, 2, DAWRX_WT
> clrrdi r4, r4, 3
> std r4, VCPU_DAWR(r3)
> std r5, VCPU_DAWRX(r3)
Ping?
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
@ 2015-12-07 12:01 ` Thomas Huth
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Huth @ 2015-12-07 12:01 UTC (permalink / raw)
To: kvm-ppc, Paul Mackerras; +Cc: kvm
On 20/11/15 09:11, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>
> /* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
> 2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
> - rlwimi r5, r4, 1, DAWRX_WT
> + rlwimi r5, r4, 2, DAWRX_WT
> clrrdi r4, r4, 3
> std r4, VCPU_DAWR(r3)
> std r5, VCPU_DAWRX(r3)
Ping?
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
2015-11-20 8:11 ` Thomas Huth
@ 2015-12-10 0:40 ` Paul Mackerras
-1 siblings, 0 replies; 10+ messages in thread
From: Paul Mackerras @ 2015-12-10 0:40 UTC (permalink / raw)
To: Thomas Huth; +Cc: kvm-ppc, lvivier, kvm, dgibson
On Fri, Nov 20, 2015 at 09:11:45AM +0100, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Thanks, applied to my kvm-ppc-next branch, with cc: stable@vger.kernel.org.
Paul.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
@ 2015-12-10 0:40 ` Paul Mackerras
0 siblings, 0 replies; 10+ messages in thread
From: Paul Mackerras @ 2015-12-10 0:40 UTC (permalink / raw)
To: Thomas Huth; +Cc: kvm-ppc, lvivier, kvm, dgibson
On Fri, Nov 20, 2015 at 09:11:45AM +0100, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Thanks, applied to my kvm-ppc-next branch, with cc: stable@vger.kernel.org.
Paul.
^ permalink raw reply [flat|nested] 10+ messages in thread