From: Sergey Fedorov <serge.fdrv@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>
Cc: Laurent Desnogues <laurent.desnogues@gmail.com>,
qemu-arm@nongnu.org, Patch Tracking <patches@linaro.org>
Subject: Re: [Qemu-arm] [PATCH] target-arm/translate-a64.c: Correct unallocated checks for ldst_excl
Date: Mon, 23 Nov 2015 21:42:45 +0300 [thread overview]
Message-ID: <56535E25.90305@gmail.com> (raw)
In-Reply-To: <CAFEAcA8Xvw+Q4PjOrhswT__M4a-Aj2uPpEcsZqpNbSAoKmTBmQ@mail.gmail.com>
On 23.11.2015 19:49, Peter Maydell wrote:
> Ping? I forgot to mark this for-2.5, and given how long the bug's
> been hanging around there's not much urgency to fixing it, but
> we might as well put the fix into 2.5 if it gets reviewed.
>
Hi, Peter. I'm going to review this carefully in a few days :)
For now, I see that the comment for this function should be updated to
match new code.
Best,
Sergey
>
> On 16 November 2015 at 18:28, Peter Maydell <peter.maydell@linaro.org> wrote:
>> The checks for the unallocated encodings in the ldst_excl group
>> (exclusives and load-acquire/store-release) were not correct. This
>> error meant that in turn we ended up with code attempting to handle
>> the non-existent case of "non-exclusive load-acquire/store-release
>> pair". Delete that broken and now unreachable code.
>>
>> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
>> ---
>> The easiest way to validate that we have the unallocated
>> conditions correct now is to look at C4.4.6 "load/store exclusive"
>> in the v8 ARM ARM rev A.h: our three conditions correspond
>> to the three "unallocated" rows in the decode table.
>>
>> PS: Laurent originally reported this way back in 2014:
>> http://lists.gnu.org/archive/html/qemu-devel/2014-10/msg01255.html
>>
>> target-arm/translate-a64.c | 12 ++----------
>> 1 file changed, 2 insertions(+), 10 deletions(-)
>>
>> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
>> index fe485a4..890ace4 100644
>> --- a/target-arm/translate-a64.c
>> +++ b/target-arm/translate-a64.c
>> @@ -1833,7 +1833,8 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
>> int size = extract32(insn, 30, 2);
>> TCGv_i64 tcg_addr;
>>
>> - if ((!is_excl && !is_lasr) ||
>> + if ((!is_excl && !is_pair && !is_lasr) ||
>> + (!is_excl && is_pair) ||
>> (is_pair && size < 2)) {
>> unallocated_encoding(s);
>> return;
>> @@ -1862,15 +1863,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
>> } else {
>> do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false);
>> }
>> - if (is_pair) {
>> - TCGv_i64 tcg_rt2 = cpu_reg(s, rt);
>> - tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
>> - if (is_store) {
>> - do_gpr_st(s, tcg_rt2, tcg_addr, size);
>> - } else {
>> - do_gpr_ld(s, tcg_rt2, tcg_addr, size, false, false);
>> - }
>> - }
>> }
>> }
>>
>> --
>> 1.9.1
>>
WARNING: multiple messages have this Message-ID (diff)
From: Sergey Fedorov <serge.fdrv@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>
Cc: Laurent Desnogues <laurent.desnogues@gmail.com>,
qemu-arm@nongnu.org, Patch Tracking <patches@linaro.org>
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH] target-arm/translate-a64.c: Correct unallocated checks for ldst_excl
Date: Mon, 23 Nov 2015 21:42:45 +0300 [thread overview]
Message-ID: <56535E25.90305@gmail.com> (raw)
In-Reply-To: <CAFEAcA8Xvw+Q4PjOrhswT__M4a-Aj2uPpEcsZqpNbSAoKmTBmQ@mail.gmail.com>
On 23.11.2015 19:49, Peter Maydell wrote:
> Ping? I forgot to mark this for-2.5, and given how long the bug's
> been hanging around there's not much urgency to fixing it, but
> we might as well put the fix into 2.5 if it gets reviewed.
>
Hi, Peter. I'm going to review this carefully in a few days :)
For now, I see that the comment for this function should be updated to
match new code.
Best,
Sergey
>
> On 16 November 2015 at 18:28, Peter Maydell <peter.maydell@linaro.org> wrote:
>> The checks for the unallocated encodings in the ldst_excl group
>> (exclusives and load-acquire/store-release) were not correct. This
>> error meant that in turn we ended up with code attempting to handle
>> the non-existent case of "non-exclusive load-acquire/store-release
>> pair". Delete that broken and now unreachable code.
>>
>> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
>> ---
>> The easiest way to validate that we have the unallocated
>> conditions correct now is to look at C4.4.6 "load/store exclusive"
>> in the v8 ARM ARM rev A.h: our three conditions correspond
>> to the three "unallocated" rows in the decode table.
>>
>> PS: Laurent originally reported this way back in 2014:
>> http://lists.gnu.org/archive/html/qemu-devel/2014-10/msg01255.html
>>
>> target-arm/translate-a64.c | 12 ++----------
>> 1 file changed, 2 insertions(+), 10 deletions(-)
>>
>> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
>> index fe485a4..890ace4 100644
>> --- a/target-arm/translate-a64.c
>> +++ b/target-arm/translate-a64.c
>> @@ -1833,7 +1833,8 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
>> int size = extract32(insn, 30, 2);
>> TCGv_i64 tcg_addr;
>>
>> - if ((!is_excl && !is_lasr) ||
>> + if ((!is_excl && !is_pair && !is_lasr) ||
>> + (!is_excl && is_pair) ||
>> (is_pair && size < 2)) {
>> unallocated_encoding(s);
>> return;
>> @@ -1862,15 +1863,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
>> } else {
>> do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false);
>> }
>> - if (is_pair) {
>> - TCGv_i64 tcg_rt2 = cpu_reg(s, rt);
>> - tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
>> - if (is_store) {
>> - do_gpr_st(s, tcg_rt2, tcg_addr, size);
>> - } else {
>> - do_gpr_ld(s, tcg_rt2, tcg_addr, size, false, false);
>> - }
>> - }
>> }
>> }
>>
>> --
>> 1.9.1
>>
next prev parent reply other threads:[~2015-11-23 18:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-16 18:28 [PATCH] target-arm/translate-a64.c: Correct unallocated checks for ldst_excl Peter Maydell
2015-11-16 18:28 ` [Qemu-devel] " Peter Maydell
2015-11-23 16:49 ` [Qemu-arm] " Peter Maydell
2015-11-23 16:49 ` [Qemu-devel] " Peter Maydell
2015-11-23 18:42 ` Sergey Fedorov [this message]
2015-11-23 18:42 ` Sergey Fedorov
2015-11-23 18:54 ` Sergey Fedorov
2015-11-23 18:54 ` [Qemu-devel] " Sergey Fedorov
2015-11-24 11:03 ` Peter Maydell
2015-11-24 11:03 ` [Qemu-devel] " Peter Maydell
2015-11-24 12:14 ` Sergey Fedorov
2015-11-24 12:14 ` [Qemu-devel] " Sergey Fedorov
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