* [PATCH] x86: __{cpu,dev}initdata drop follow-up
@ 2015-12-02 13:51 Jan Beulich
2015-12-02 13:55 ` Andrew Cooper
0 siblings, 1 reply; 2+ messages in thread
From: Jan Beulich @ 2015-12-02 13:51 UTC (permalink / raw)
To: xen-devel
Cc: Andrew Cooper, Keir Fraser, Aravind Gopalakrishnan,
Suravee Suthikulpanit
[-- Attachment #1: Type: text/plain, Size: 2284 bytes --]
While reviewing those patches I noticed a few types that could do with
tweaking.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
For the AMD MWAIT change it would certainly be nice to get confirmation
on whether just Fam10 doesn't deep-sleep, or whether there's a wider
range (I'm pretty sure modern families don't have such a limitation
anymore).
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -332,8 +332,6 @@ static void disable_c1_ramping(void)
}
}
-int force_mwait;
-
static void disable_c1e(void *unused)
{
uint64_t msr_content;
@@ -510,7 +508,7 @@ static void __devinit init_amd(struct cp
amd_get_topology(c);
/* Pointless to use MWAIT on Family10 as it does not deep sleep. */
- if (c->x86 >= 0x10 && !force_mwait)
+ if (c->x86 == 0x10)
__clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121))
--- a/xen/arch/x86/cpu/intel_cacheinfo.c
+++ b/xen/arch/x86/cpu/intel_cacheinfo.c
@@ -27,7 +27,7 @@ struct _cache_table
};
/* all the cache descriptor types we care about (no TLB or trace cache entries) */
-static struct _cache_table cache_table[] =
+static const struct _cache_table cache_table[] =
{
{ 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
{ 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
--- a/xen/arch/x86/numa.c
+++ b/xen/arch/x86/numa.c
@@ -49,9 +49,8 @@ cpumask_t node_to_cpumask[MAX_NUMNODES]
nodemask_t __read_mostly node_online_map = { { [0] = 1UL } };
-int numa_off = 0;
-
-int acpi_numa;
+bool_t numa_off = 0;
+s8 acpi_numa = 0;
int srat_disabled(void)
{
--- a/xen/include/asm-x86/acpi.h
+++ b/xen/include/asm-x86/acpi.h
@@ -107,7 +107,7 @@ extern void acpi_reserve_bootmem(void);
#define ARCH_HAS_POWER_INIT 1
-extern int acpi_numa;
+extern s8 acpi_numa;
extern int acpi_scan_nodes(u64 start, u64 end);
#define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
--- a/xen/include/asm-x86/numa.h
+++ b/xen/include/asm-x86/numa.h
@@ -30,7 +30,7 @@ extern nodeid_t pxm_to_node(unsigned int
extern void numa_add_cpu(int cpu);
extern void numa_init_array(void);
-extern int numa_off;
+extern bool_t numa_off;
extern int srat_disabled(void);
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x86: __{cpu,dev}initdata drop follow-up
While reviewing those patches I noticed a few types that could do with
tweaking.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
For the AMD MWAIT change it would certainly be nice to get confirmation
on whether just Fam10 doesn't deep-sleep, or whether there's a wider
range (I'm pretty sure modern families don't have such a limitation
anymore).
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -332,8 +332,6 @@ static void disable_c1_ramping(void)
}
}
-int force_mwait;
-
static void disable_c1e(void *unused)
{
uint64_t msr_content;
@@ -510,7 +508,7 @@ static void __devinit init_amd(struct cp
amd_get_topology(c);
/* Pointless to use MWAIT on Family10 as it does not deep sleep. */
- if (c->x86 >= 0x10 && !force_mwait)
+ if (c->x86 == 0x10)
__clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121))
--- a/xen/arch/x86/cpu/intel_cacheinfo.c
+++ b/xen/arch/x86/cpu/intel_cacheinfo.c
@@ -27,7 +27,7 @@ struct _cache_table
};
/* all the cache descriptor types we care about (no TLB or trace cache entries) */
-static struct _cache_table cache_table[] =
+static const struct _cache_table cache_table[] =
{
{ 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
{ 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
--- a/xen/arch/x86/numa.c
+++ b/xen/arch/x86/numa.c
@@ -49,9 +49,8 @@ cpumask_t node_to_cpumask[MAX_NUMNODES]
nodemask_t __read_mostly node_online_map = { { [0] = 1UL } };
-int numa_off = 0;
-
-int acpi_numa;
+bool_t numa_off = 0;
+s8 acpi_numa = 0;
int srat_disabled(void)
{
--- a/xen/include/asm-x86/acpi.h
+++ b/xen/include/asm-x86/acpi.h
@@ -107,7 +107,7 @@ extern void acpi_reserve_bootmem(void);
#define ARCH_HAS_POWER_INIT 1
-extern int acpi_numa;
+extern s8 acpi_numa;
extern int acpi_scan_nodes(u64 start, u64 end);
#define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
--- a/xen/include/asm-x86/numa.h
+++ b/xen/include/asm-x86/numa.h
@@ -30,7 +30,7 @@ extern nodeid_t pxm_to_node(unsigned int
extern void numa_add_cpu(int cpu);
extern void numa_init_array(void);
-extern int numa_off;
+extern bool_t numa_off;
extern int srat_disabled(void);
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] x86: __{cpu,dev}initdata drop follow-up
2015-12-02 13:51 [PATCH] x86: __{cpu,dev}initdata drop follow-up Jan Beulich
@ 2015-12-02 13:55 ` Andrew Cooper
0 siblings, 0 replies; 2+ messages in thread
From: Andrew Cooper @ 2015-12-02 13:55 UTC (permalink / raw)
To: Jan Beulich, xen-devel
Cc: Aravind Gopalakrishnan, Keir Fraser, Suravee Suthikulpanit
On 02/12/15 13:51, Jan Beulich wrote:
> While reviewing those patches I noticed a few types that could do with
> tweaking.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2015-12-02 13:51 [PATCH] x86: __{cpu,dev}initdata drop follow-up Jan Beulich
2015-12-02 13:55 ` Andrew Cooper
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