From: Michael Davidsaver <mdavidsaver@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com>,
qemu-arm@nongnu.org, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-arm] [PATCH 01/18] armv7m: MRS/MSR handle unprivileged access
Date: Wed, 02 Dec 2015 17:51:32 -0500 [thread overview]
Message-ID: <565F75F4.1080402@gmail.com> (raw)
In-Reply-To: <CAFEAcA_vH5thMyAD+nrz_zoB-oBV=EujBEv86j+1gL5Xv-Fgqg@mail.gmail.com>
On 11/17/2015 12:09 PM, Peter Maydell wrote:
> On 9 November 2015 at 01:11, Michael Davidsaver <mdavidsaver@gmail.com> wrote:
>> The MRS and MSR instruction handling isn't checking
>> the current permission level.
>>
>> Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
>> ---
>> target-arm/helper.c | 79 +++++++++++++++++++++++++----------------------------
>> 1 file changed, 37 insertions(+), 42 deletions(-)
>
> This patch looks good overall, but there's one style nit:
>
>> + case 0 ... 7: /* xPSR sub-fields */
>> + mask = 0;
>> + if ((reg&1) && el) {
>
> you want spaces around operators, so "reg & 1" here and elsewhere.
Would be nice if checkpatch.pl caught these, but I understand that this would be quite difficult to do well. I've tried to catch this with grep and sort through the false positives. I think I got them all.
> It would also be good to mention in the commit message the
> other things this patch is fixing:
> * privileged attempts to write EPSR should do nothing
> * accessing an unknown special register now triggers a
> guest-error warning rather than aborting QEMU
Will do.
WARNING: multiple messages have this Message-ID (diff)
From: Michael Davidsaver <mdavidsaver@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com>,
qemu-arm@nongnu.org, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 01/18] armv7m: MRS/MSR handle unprivileged access
Date: Wed, 02 Dec 2015 17:51:32 -0500 [thread overview]
Message-ID: <565F75F4.1080402@gmail.com> (raw)
In-Reply-To: <CAFEAcA_vH5thMyAD+nrz_zoB-oBV=EujBEv86j+1gL5Xv-Fgqg@mail.gmail.com>
On 11/17/2015 12:09 PM, Peter Maydell wrote:
> On 9 November 2015 at 01:11, Michael Davidsaver <mdavidsaver@gmail.com> wrote:
>> The MRS and MSR instruction handling isn't checking
>> the current permission level.
>>
>> Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
>> ---
>> target-arm/helper.c | 79 +++++++++++++++++++++++++----------------------------
>> 1 file changed, 37 insertions(+), 42 deletions(-)
>
> This patch looks good overall, but there's one style nit:
>
>> + case 0 ... 7: /* xPSR sub-fields */
>> + mask = 0;
>> + if ((reg&1) && el) {
>
> you want spaces around operators, so "reg & 1" here and elsewhere.
Would be nice if checkpatch.pl caught these, but I understand that this would be quite difficult to do well. I've tried to catch this with grep and sort through the false positives. I think I got them all.
> It would also be good to mention in the commit message the
> other things this patch is fixing:
> * privileged attempts to write EPSR should do nothing
> * accessing an unknown special register now triggers a
> guest-error warning rather than aborting QEMU
Will do.
next prev parent reply other threads:[~2015-12-02 22:51 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-09 1:11 [Qemu-devel] [PATCH 00/18] Fix exception handling and msr/mrs access Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 01/18] armv7m: MRS/MSR handle unprivileged access Michael Davidsaver
2015-11-17 17:09 ` [Qemu-arm] " Peter Maydell
2015-11-17 17:09 ` [Qemu-devel] " Peter Maydell
2015-12-02 22:51 ` Michael Davidsaver [this message]
2015-12-02 22:51 ` Michael Davidsaver
2015-12-02 23:04 ` [Qemu-arm] " Peter Maydell
2015-12-02 23:04 ` [Qemu-devel] " Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 02/18] armv7m: Undo armv7m.hack Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 03/18] armv7m: Complain about incorrect exception table entries Michael Davidsaver
2015-11-17 17:20 ` Peter Maydell
2015-12-02 22:52 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 22:52 ` [Qemu-devel] " Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 04/18] armv7m: Explicit error for bad vector table Michael Davidsaver
2015-11-17 17:33 ` [Qemu-arm] " Peter Maydell
2015-11-17 17:33 ` [Qemu-devel] " Peter Maydell
2015-12-02 22:55 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 22:55 ` [Qemu-devel] " Michael Davidsaver
2015-12-02 23:09 ` [Qemu-arm] " Peter Maydell
2015-12-02 23:09 ` [Qemu-devel] " Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 05/18] armv7m: expand NVIC state Michael Davidsaver
2015-11-17 18:10 ` [Qemu-arm] " Peter Maydell
2015-11-17 18:10 ` [Qemu-devel] " Peter Maydell
2015-12-02 22:58 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 22:58 ` [Qemu-devel] " Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 06/18] armv7m: new NVIC utility functions Michael Davidsaver
2015-11-20 13:25 ` [Qemu-arm] " Peter Maydell
2015-11-20 13:25 ` [Qemu-devel] " Peter Maydell
2015-12-02 23:18 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 23:18 ` [Qemu-devel] " Michael Davidsaver
2015-12-03 0:11 ` Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 07/18] armv7m: Update NVIC registers Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 08/18] armv7m: fix RETTOBASE Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 09/18] armv7m: NVIC update vmstate Michael Davidsaver
2015-11-17 17:58 ` [Qemu-arm] " Peter Maydell
2015-11-17 17:58 ` [Qemu-devel] " Peter Maydell
2015-12-02 23:19 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 23:19 ` [Qemu-devel] " Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 10/18] armv7m: NVIC initialization Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 11/18] armv7m: fix I and F flag handling Michael Davidsaver
2015-11-20 13:47 ` [Qemu-arm] " Peter Maydell
2015-11-20 13:47 ` [Qemu-devel] " Peter Maydell
2015-12-02 23:22 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 23:22 ` [Qemu-devel] " Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 12/18] armv7m: simpler/faster exception start Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 13/18] armv7m: implement CFSR and HFSR Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 14/18] armv7m: auto-clear FAULTMASK Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 15/18] arm: gic: Remove references to NVIC Michael Davidsaver
2015-11-17 18:00 ` [Qemu-arm] " Peter Maydell
2015-11-17 18:00 ` [Qemu-devel] " Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 16/18] armv7m: check exception return consistency Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 17/18] armv7m: implement CCR Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 18/18] armv7m: prevent unprivileged write to STIR Michael Davidsaver
2015-11-17 17:07 ` [Qemu-arm] [PATCH 00/18] Fix exception handling and msr/mrs access Peter Maydell
2015-11-17 17:07 ` [Qemu-devel] " Peter Maydell
2015-11-20 13:59 ` Peter Maydell
2015-12-02 22:48 ` [Qemu-arm] " Michael Davidsaver
2015-12-02 22:48 ` [Qemu-devel] " Michael Davidsaver
2015-12-17 19:36 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:36 ` [Qemu-devel] " Peter Maydell
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