From: Tero Kristo <t-kristo@ti.com>
To: Tony Lindgren <tony@atomide.com>
Cc: <linux-omap@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<sboyd@codeaurora.org>, <mturquette@baylibre.com>,
<paul@pwsan.com>, <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] clk: ti: omap5+: dpll: implement errata i810
Date: Fri, 11 Dec 2015 10:43:35 +0200 [thread overview]
Message-ID: <566A8CB7.4050701@ti.com> (raw)
In-Reply-To: <20151203164817.GT23396@atomide.com>
On 12/03/2015 06:48 PM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [151130 06:44]:
>> + /*
>> + * Errata i810 - DPLL controller can get stuck while transitioning
>> + * to a power saving state. Software must ensure the DPLL can not
>> + * transition to a low power state while changing M/N values.
>> + * Easiest way to accomplish this is to prevent DPLL autoidle
>> + * before doing the M/N re-program.
>> + */
>> + errata_i810 = ti_clk_get_features()->flags & TI_CLK_ERRATA_I810;
>> +
>> + if (errata_i810) {
>> + ai = omap3_dpll_autoidle_read(clk);
>> + if (ai) {
>> + omap3_dpll_deny_idle(clk);
>> +
>> + /* OCP barrier */
>> + omap3_dpll_autoidle_read(clk);
>> + }
>> + }
>
> Should we just do this unconditionally? It seems like disabling the
> autoidle always before reprogramming is a good idea.
Well, that is a few extra register accesses, but given the DPLL
re-programming is a slow operation it probably does not matter. Let me
spin a new version of this patch, it will avoid the need for the errata
flag also.
-Tero
WARNING: multiple messages have this Message-ID (diff)
From: Tero Kristo <t-kristo@ti.com>
To: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org, linux-clk@vger.kernel.org,
sboyd@codeaurora.org, mturquette@baylibre.com, paul@pwsan.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] clk: ti: omap5+: dpll: implement errata i810
Date: Fri, 11 Dec 2015 10:43:35 +0200 [thread overview]
Message-ID: <566A8CB7.4050701@ti.com> (raw)
In-Reply-To: <20151203164817.GT23396@atomide.com>
On 12/03/2015 06:48 PM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [151130 06:44]:
>> + /*
>> + * Errata i810 - DPLL controller can get stuck while transitioning
>> + * to a power saving state. Software must ensure the DPLL can not
>> + * transition to a low power state while changing M/N values.
>> + * Easiest way to accomplish this is to prevent DPLL autoidle
>> + * before doing the M/N re-program.
>> + */
>> + errata_i810 = ti_clk_get_features()->flags & TI_CLK_ERRATA_I810;
>> +
>> + if (errata_i810) {
>> + ai = omap3_dpll_autoidle_read(clk);
>> + if (ai) {
>> + omap3_dpll_deny_idle(clk);
>> +
>> + /* OCP barrier */
>> + omap3_dpll_autoidle_read(clk);
>> + }
>> + }
>
> Should we just do this unconditionally? It seems like disabling the
> autoidle always before reprogramming is a good idea.
Well, that is a few extra register accesses, but given the DPLL
re-programming is a slow operation it probably does not matter. Let me
spin a new version of this patch, it will avoid the need for the errata
flag also.
-Tero
WARNING: multiple messages have this Message-ID (diff)
From: t-kristo@ti.com (Tero Kristo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] clk: ti: omap5+: dpll: implement errata i810
Date: Fri, 11 Dec 2015 10:43:35 +0200 [thread overview]
Message-ID: <566A8CB7.4050701@ti.com> (raw)
In-Reply-To: <20151203164817.GT23396@atomide.com>
On 12/03/2015 06:48 PM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [151130 06:44]:
>> + /*
>> + * Errata i810 - DPLL controller can get stuck while transitioning
>> + * to a power saving state. Software must ensure the DPLL can not
>> + * transition to a low power state while changing M/N values.
>> + * Easiest way to accomplish this is to prevent DPLL autoidle
>> + * before doing the M/N re-program.
>> + */
>> + errata_i810 = ti_clk_get_features()->flags & TI_CLK_ERRATA_I810;
>> +
>> + if (errata_i810) {
>> + ai = omap3_dpll_autoidle_read(clk);
>> + if (ai) {
>> + omap3_dpll_deny_idle(clk);
>> +
>> + /* OCP barrier */
>> + omap3_dpll_autoidle_read(clk);
>> + }
>> + }
>
> Should we just do this unconditionally? It seems like disabling the
> autoidle always before reprogramming is a good idea.
Well, that is a few extra register accesses, but given the DPLL
re-programming is a slow operation it probably does not matter. Let me
spin a new version of this patch, it will avoid the need for the errata
flag also.
-Tero
next prev parent reply other threads:[~2015-12-11 8:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-30 14:43 [PATCH] clk: ti: omap5+: dpll: implement errata i810 Tero Kristo
2015-11-30 14:43 ` Tero Kristo
2015-11-30 14:43 ` Tero Kristo
2015-11-30 19:35 ` Stephen Boyd
2015-11-30 19:35 ` Stephen Boyd
2015-12-03 16:48 ` Tony Lindgren
2015-12-03 16:48 ` Tony Lindgren
2015-12-11 8:43 ` Tero Kristo [this message]
2015-12-11 8:43 ` Tero Kristo
2015-12-11 8:43 ` Tero Kristo
2015-12-11 16:55 ` Tony Lindgren
2015-12-11 16:55 ` Tony Lindgren
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