* [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc @ 2015-12-19 13:43 Angelo Dureghello 2015-12-19 13:43 ` [U-Boot] [PATCH 2/2] m68k: add DM model serial driver Angelo Dureghello 2015-12-19 20:29 ` [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc Simon Glass 0 siblings, 2 replies; 6+ messages in thread From: Angelo Dureghello @ 2015-12-19 13:43 UTC (permalink / raw) To: u-boot To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> --- arch/m68k/cpu/mcf5227x/start.S | 8 ++++++++ arch/m68k/cpu/mcf523x/start.S | 8 ++++++++ arch/m68k/cpu/mcf52x2/start.S | 8 ++++++++ arch/m68k/cpu/mcf530x/cpu_init.c | 2 +- arch/m68k/cpu/mcf530x/start.S | 8 ++++++++ arch/m68k/cpu/mcf532x/start.S | 8 ++++++++ arch/m68k/cpu/mcf5445x/start.S | 8 ++++++++ arch/m68k/cpu/mcf547x_8x/start.S | 8 ++++++++ arch/m68k/include/asm/config.h | 2 -- 9 files changed, 57 insertions(+), 3 deletions(-) diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S index 23024f9..bcb5611 100644 --- a/arch/m68k/cpu/mcf5227x/start.S +++ b/arch/m68k/cpu/mcf5227x/start.S @@ -379,6 +379,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index 8a23e72..14b3025 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -141,6 +141,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index 8a59496..abb9291 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -198,6 +198,14 @@ _after_flashbar_copy: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf530x/cpu_init.c b/arch/m68k/cpu/mcf530x/cpu_init.c index 80dc239..b09eed8 100644 --- a/arch/m68k/cpu/mcf530x/cpu_init.c +++ b/arch/m68k/cpu/mcf530x/cpu_init.c @@ -142,7 +142,7 @@ int cpu_init_r(void) return 0; } -void uart_port_conf(void) +void uart_port_conf(int port) { } diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S index 097958a..d9034e1 100644 --- a/arch/m68k/cpu/mcf530x/start.S +++ b/arch/m68k/cpu/mcf530x/start.S @@ -137,6 +137,14 @@ _start: /* put relocation table address to a5 */ move.l #__got_start, %a5 + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + /* run low-level CPU init code (from flash) */ bsr cpu_init_f diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S index 3b9ede0..98a5401 100644 --- a/arch/m68k/cpu/mcf532x/start.S +++ b/arch/m68k/cpu/mcf532x/start.S @@ -155,6 +155,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index 979eb5a..340ab84 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -664,6 +664,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S index 75de22d..0468d1a 100644 --- a/arch/m68k/cpu/mcf547x_8x/start.S +++ b/arch/m68k/cpu/mcf547x_8x/start.S @@ -148,6 +148,14 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ + /* Allocate and zero GD, update SP */ + move.l %sp,-(%sp) + bsr board_init_f_mem + + /* Update stack- and frame-pointers */ + move.l %d0, %sp + move.l %sp, %fp + jbsr cpu_init_f /* run low-level CPU init code (from flash) */ jbsr board_init_f /* run low-level board init code (from flash) */ diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h index e1458ac..9c4d3fb 100644 --- a/arch/m68k/include/asm/config.h +++ b/arch/m68k/include/asm/config.h @@ -7,8 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_GENERIC_GLOBAL_DATA - #define CONFIG_NEEDS_MANUAL_RELOC #define CONFIG_LMB -- 2.5.3 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] m68k: add DM model serial driver 2015-12-19 13:43 [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc Angelo Dureghello @ 2015-12-19 13:43 ` Angelo Dureghello 2015-12-19 20:29 ` Simon Glass 2015-12-19 20:29 ` [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc Simon Glass 1 sibling, 1 reply; 6+ messages in thread From: Angelo Dureghello @ 2015-12-19 13:43 UTC (permalink / raw) To: u-boot Boards can now use DM serial driver, or still legacy mcf uart driver version. Add DM-related changes for AMCORE board, to use as a tested example. Signed-off-by: Angelo Dureghello <angelo@sysam.it> --- board/sysam/amcore/amcore.c | 33 +++++ configs/amcore_defconfig | 2 + drivers/serial/mcfuart.c | 193 ++++++++++++++++++++++------- include/dm/platform_data/serial_coldfire.h | 23 ++++ 4 files changed, 207 insertions(+), 44 deletions(-) create mode 100644 include/dm/platform_data/serial_coldfire.h diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c index 42b7c23..523f374 100644 --- a/board/sysam/amcore/amcore.c +++ b/board/sysam/amcore/amcore.c @@ -9,6 +9,8 @@ */ #include <common.h> +#include <dm.h> +#include <dm/platform_data/serial_coldfire.h> #include <asm/immap.h> #include <asm/io.h> @@ -47,6 +49,26 @@ void fudelay(int usec) asm volatile ("nop"); } +/* + * allows a pre-console debug + * using some leds + */ +void debug_leds(unsigned short on) +{ + sim_t *sim = (sim_t *)(MMAP_SIM); + gpio_t *gpio = (gpio_t *)(MMAP_GPIO); + unsigned short switch_on = on; + + out_be16(&sim->par, 0x0000); + out_be16(&gpio->paddr, 0xffff); + + switch_on = ~switch_on; + out_be16(&gpio->padat, switch_on); + + for (;;) + ; +} + phys_size_t initdram(int board_type) { u32 dramsize, RC; @@ -99,3 +121,14 @@ phys_size_t initdram(int board_type) return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); } + +static struct coldfire_serial_platdata mcf5307_serial_plat = { + .base = CONFIG_SYS_UART_BASE, + .port = 0, + .baudrate = CONFIG_BAUDRATE, +}; + +U_BOOT_DEVICE(coldfire_serial) = { + .name = "serial_coldfire", + .platdata = &mcf5307_serial_plat, +}; diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index ad69f0a..0cadc03 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -1,6 +1,8 @@ CONFIG_M68K=y CONFIG_TARGET_AMCORE=y CONFIG_SYS_PROMPT="amcore $ " +CONFIG_DM=y +CONFIG_DM_SERIAL=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c index 407354f..03a4d64 100644 --- a/drivers/serial/mcfuart.c +++ b/drivers/serial/mcfuart.c @@ -2,6 +2,9 @@ * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. * TsiChung Liew, Tsi-Chung.Liew at freescale.com. * + * Modified to add device model (DM) support + * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it> + * * SPDX-License-Identifier: GPL-2.0+ */ @@ -11,101 +14,123 @@ */ #include <common.h> +#include <dm.h> #include <serial.h> #include <linux/compiler.h> - #include <asm/immap.h> #include <asm/uart.h> +#ifdef CONFIG_DM_SERIAL +# include <dm/platform_data/serial_coldfire.h> +#endif DECLARE_GLOBAL_DATA_PTR; extern void uart_port_conf(int port); -static int mcf_serial_init(void) +static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate) { - volatile uart_t *uart; u32 counter; - uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); - - uart_port_conf(CONFIG_SYS_UART_PORT); + uart_port_conf(port_idx); /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ - uart->ucr = UART_UCR_RESET_RX; - uart->ucr = UART_UCR_RESET_TX; - uart->ucr = UART_UCR_RESET_ERROR; - uart->ucr = UART_UCR_RESET_MR; + writeb(UART_UCR_RESET_RX, &uart->ucr); + writeb(UART_UCR_RESET_TX, &uart->ucr); + writeb(UART_UCR_RESET_ERROR, &uart->ucr); + writeb(UART_UCR_RESET_MR, &uart->ucr); __asm__("nop"); - uart->uimr = 0; + writeb(0, &uart->uimr); /* write to CSR: RX/TX baud rate from timers */ - uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK); + writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr); - uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE); - uart->umr = UART_UMR_SB_STOP_BITS_1; + writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); + writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); /* Setting up BaudRate */ - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); - counter = counter / gd->baudrate; + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); + counter = counter / baudrate; /* write to CTUR: divide counter upper byte */ - uart->ubg1 = (u8) ((counter & 0xff00) >> 8); + writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1); /* write to CTLR: divide counter lower byte */ - uart->ubg2 = (u8) (counter & 0x00ff); + writeb((u8)(counter & 0x00ff), &uart->ubg2); - uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED); + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); return (0); } +static void mcf_serial_setbrg_common(uart_t *uart, int baudrate) +{ + u32 counter; + + /* Setting up BaudRate */ + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); + counter = counter / baudrate; + + /* write to CTUR: divide counter upper byte */ + writeb(((counter & 0xff00) >> 8), &uart->ubg1); + /* write to CTLR: divide counter lower byte */ + writeb((counter & 0x00ff), &uart->ubg2); + + writeb(UART_UCR_RESET_RX, &uart->ucr); + writeb(UART_UCR_RESET_TX, &uart->ucr); + + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); +} + +#ifndef CONFIG_DM_SERIAL + +static int mcf_serial_init(void) +{ + uart_t *uart_base; + int port_idx; + + uart_base = (uart_t *)CONFIG_SYS_UART_BASE; + port_idx = CONFIG_SYS_UART_PORT; + + return mcf_serial_init_common(uart_base, port_idx, gd->baudrate); +} + static void mcf_serial_putc(const char c) { - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; if (c == '\n') serial_putc('\r'); /* Wait for last character to go. */ - while (!(uart->usr & UART_USR_TXRDY)) ; + while (!(readb(&uart->usr) & UART_USR_TXRDY)) + ; - uart->utb = c; + writeb(c, &uart->utb); } static int mcf_serial_getc(void) { - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; /* Wait for a character to arrive. */ - while (!(uart->usr & UART_USR_RXRDY)) ; - return uart->urb; -} + while (!(readb(&uart->usr) & UART_USR_RXRDY)) + ; -static int mcf_serial_tstc(void) -{ - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); - - return (uart->usr & UART_USR_RXRDY); + return readb(&uart->urb); } static void mcf_serial_setbrg(void) { - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); - u32 counter; + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; - /* Setting up BaudRate */ - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); - counter = counter / gd->baudrate; - - /* write to CTUR: divide counter upper byte */ - uart->ubg1 = ((counter & 0xff00) >> 8); - /* write to CTLR: divide counter lower byte */ - uart->ubg2 = (counter & 0x00ff); + mcf_serial_setbrg_common(uart, gd->baudrate); +} - uart->ucr = UART_UCR_RESET_RX; - uart->ucr = UART_UCR_RESET_TX; +static int mcf_serial_tstc(void) +{ + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; - uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; + return readb(&uart->usr) & UART_USR_RXRDY; } static struct serial_device mcf_serial_drv = { @@ -128,3 +153,83 @@ __weak struct serial_device *default_serial_console(void) { return &mcf_serial_drv; } + +#endif + +#ifdef CONFIG_DM_SERIAL + +static int coldfire_serial_probe(struct udevice *dev) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + + return mcf_serial_init_common((uart_t *)plat->base, + plat->port, plat->baudrate); +} + +static int coldfire_serial_putc(struct udevice *dev, const char ch) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)plat->base; + + if (ch == '\n') + serial_putc('\r'); + + /* Wait for last character to go. */ + while (!(readb(&uart->usr) & UART_USR_TXRDY)) + ; + + writeb(ch, &uart->utb); + + return 0; +} + +static int coldfire_serial_getc(struct udevice *dev) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)(plat->base); + + /* Wait for a character to arrive. */ + while (!(readb(&uart->usr) & UART_USR_RXRDY)) + ; + + return readb(&uart->urb); +} + +int coldfire_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)(plat->base); + + mcf_serial_setbrg_common(uart, baudrate); + + return 0; +} + +static int coldfire_serial_pending(struct udevice *dev, bool input) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)(plat->base); + + if (input) + return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0; + else + return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1; + + return 0; +} + +static const struct dm_serial_ops coldfire_serial_ops = { + .putc = coldfire_serial_putc, + .pending = coldfire_serial_pending, + .getc = coldfire_serial_getc, + .setbrg = coldfire_serial_setbrg, +}; + +U_BOOT_DRIVER(serial_coldfire) = { + .name = "serial_coldfire", + .id = UCLASS_SERIAL, + .probe = coldfire_serial_probe, + .ops = &coldfire_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif diff --git a/include/dm/platform_data/serial_coldfire.h b/include/dm/platform_data/serial_coldfire.h new file mode 100644 index 0000000..fc1ad71 --- /dev/null +++ b/include/dm/platform_data/serial_coldfire.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2015 Angelo Dureghello <angelo@sysam.it> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __serial_coldfire_h +#define __serial_coldfire_h + +/* + * struct coldfire_serial_platdata - information about a coldfire port + * + * @base: Uart port base register address + * @port: Uart port index, for cpu with pinmux for uart / gpio + * baudrtatre: Uart port baudrate + */ +struct coldfire_serial_platdata { + unsigned long base; + int port; + int baudrate; +}; + +#endif /* __serial_coldfire_h */ -- 2.5.3 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] m68k: add DM model serial driver 2015-12-19 13:43 ` [U-Boot] [PATCH 2/2] m68k: add DM model serial driver Angelo Dureghello @ 2015-12-19 20:29 ` Simon Glass 2015-12-19 22:32 ` Angelo Dureghello 0 siblings, 1 reply; 6+ messages in thread From: Simon Glass @ 2015-12-19 20:29 UTC (permalink / raw) To: u-boot Hi Angelo, On 19 December 2015 at 06:43, Angelo Dureghello <angelo@sysam.it> wrote: > Boards can now use DM serial driver, or still legacy mcf uart > driver version. > Add DM-related changes for AMCORE board, to use as a tested example. > > Signed-off-by: Angelo Dureghello <angelo@sysam.it> > --- > > board/sysam/amcore/amcore.c | 33 +++++ > configs/amcore_defconfig | 2 + > drivers/serial/mcfuart.c | 193 ++++++++++++++++++++++------- > include/dm/platform_data/serial_coldfire.h | 23 ++++ > 4 files changed, 207 insertions(+), 44 deletions(-) > create mode 100644 include/dm/platform_data/serial_coldfire.h I suggest having the UART driver changes in one commit and your updates for a particular board in the next. > > diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c > index 42b7c23..523f374 100644 > --- a/board/sysam/amcore/amcore.c > +++ b/board/sysam/amcore/amcore.c > @@ -9,6 +9,8 @@ > */ > > #include <common.h> > +#include <dm.h> > +#include <dm/platform_data/serial_coldfire.h> > #include <asm/immap.h> > #include <asm/io.h> > > @@ -47,6 +49,26 @@ void fudelay(int usec) > asm volatile ("nop"); > } > > +/* > + * allows a pre-console debug > + * using some leds > + */ > +void debug_leds(unsigned short on) See DEBUG_UART which can provide access to an earlier UART. In any case this function should probably be in a separate commit. > +{ > + sim_t *sim = (sim_t *)(MMAP_SIM); > + gpio_t *gpio = (gpio_t *)(MMAP_GPIO); > + unsigned short switch_on = on; > + > + out_be16(&sim->par, 0x0000); > + out_be16(&gpio->paddr, 0xffff); > + > + switch_on = ~switch_on; > + out_be16(&gpio->padat, switch_on); > + > + for (;;) > + ; > +} > + > phys_size_t initdram(int board_type) > { > u32 dramsize, RC; > @@ -99,3 +121,14 @@ phys_size_t initdram(int board_type) > > return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); > } > + > +static struct coldfire_serial_platdata mcf5307_serial_plat = { > + .base = CONFIG_SYS_UART_BASE, > + .port = 0, > + .baudrate = CONFIG_BAUDRATE, > +}; > + > +U_BOOT_DEVICE(coldfire_serial) = { > + .name = "serial_coldfire", > + .platdata = &mcf5307_serial_plat, > +}; > diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig > index ad69f0a..0cadc03 100644 > --- a/configs/amcore_defconfig > +++ b/configs/amcore_defconfig > @@ -1,6 +1,8 @@ > CONFIG_M68K=y > CONFIG_TARGET_AMCORE=y > CONFIG_SYS_PROMPT="amcore $ " > +CONFIG_DM=y > +CONFIG_DM_SERIAL=y > # CONFIG_CMD_BOOTD is not set > # CONFIG_CMD_XIMG is not set > # CONFIG_CMD_FPGA is not set > diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c > index 407354f..03a4d64 100644 > --- a/drivers/serial/mcfuart.c > +++ b/drivers/serial/mcfuart.c > @@ -2,6 +2,9 @@ > * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. > * TsiChung Liew, Tsi-Chung.Liew at freescale.com. > * > + * Modified to add device model (DM) support > + * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it> > + * > * SPDX-License-Identifier: GPL-2.0+ > */ > > @@ -11,101 +14,123 @@ > */ > > #include <common.h> > +#include <dm.h> > #include <serial.h> > #include <linux/compiler.h> > - > #include <asm/immap.h> > #include <asm/uart.h> > +#ifdef CONFIG_DM_SERIAL Do you need this #ifdef? > +# include <dm/platform_data/serial_coldfire.h> > +#endif > > DECLARE_GLOBAL_DATA_PTR; > > extern void uart_port_conf(int port); > > -static int mcf_serial_init(void) > +static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate) > { > - volatile uart_t *uart; > u32 counter; > > - uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); > - > - uart_port_conf(CONFIG_SYS_UART_PORT); > + uart_port_conf(port_idx); > > /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ > - uart->ucr = UART_UCR_RESET_RX; > - uart->ucr = UART_UCR_RESET_TX; > - uart->ucr = UART_UCR_RESET_ERROR; > - uart->ucr = UART_UCR_RESET_MR; > + writeb(UART_UCR_RESET_RX, &uart->ucr); > + writeb(UART_UCR_RESET_TX, &uart->ucr); > + writeb(UART_UCR_RESET_ERROR, &uart->ucr); > + writeb(UART_UCR_RESET_MR, &uart->ucr); > __asm__("nop"); > > - uart->uimr = 0; > + writeb(0, &uart->uimr); > > /* write to CSR: RX/TX baud rate from timers */ > - uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK); > + writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr); > > - uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE); > - uart->umr = UART_UMR_SB_STOP_BITS_1; > + writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); > + writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); > > /* Setting up BaudRate */ > - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); > - counter = counter / gd->baudrate; > + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); > + counter = counter / baudrate; > > /* write to CTUR: divide counter upper byte */ > - uart->ubg1 = (u8) ((counter & 0xff00) >> 8); > + writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1); > /* write to CTLR: divide counter lower byte */ > - uart->ubg2 = (u8) (counter & 0x00ff); > + writeb((u8)(counter & 0x00ff), &uart->ubg2); > > - uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED); > + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); > > return (0); > } > > +static void mcf_serial_setbrg_common(uart_t *uart, int baudrate) > +{ > + u32 counter; > + > + /* Setting up BaudRate */ > + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); > + counter = counter / baudrate; > + > + /* write to CTUR: divide counter upper byte */ > + writeb(((counter & 0xff00) >> 8), &uart->ubg1); > + /* write to CTLR: divide counter lower byte */ > + writeb((counter & 0x00ff), &uart->ubg2); > + > + writeb(UART_UCR_RESET_RX, &uart->ucr); > + writeb(UART_UCR_RESET_TX, &uart->ucr); > + > + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); > +} > + > +#ifndef CONFIG_DM_SERIAL > + > +static int mcf_serial_init(void) > +{ > + uart_t *uart_base; > + int port_idx; > + > + uart_base = (uart_t *)CONFIG_SYS_UART_BASE; > + port_idx = CONFIG_SYS_UART_PORT; > + > + return mcf_serial_init_common(uart_base, port_idx, gd->baudrate); > +} > + > static void mcf_serial_putc(const char c) > { > - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); > + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; > > if (c == '\n') > serial_putc('\r'); > > /* Wait for last character to go. */ > - while (!(uart->usr & UART_USR_TXRDY)) ; > + while (!(readb(&uart->usr) & UART_USR_TXRDY)) > + ; > > - uart->utb = c; > + writeb(c, &uart->utb); > } > > static int mcf_serial_getc(void) > { > - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); > + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; > > /* Wait for a character to arrive. */ > - while (!(uart->usr & UART_USR_RXRDY)) ; > - return uart->urb; > -} > + while (!(readb(&uart->usr) & UART_USR_RXRDY)) > + ; > > -static int mcf_serial_tstc(void) > -{ > - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); > - > - return (uart->usr & UART_USR_RXRDY); > + return readb(&uart->urb); > } > > static void mcf_serial_setbrg(void) > { > - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); > - u32 counter; > + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; > > - /* Setting up BaudRate */ > - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); > - counter = counter / gd->baudrate; > - > - /* write to CTUR: divide counter upper byte */ > - uart->ubg1 = ((counter & 0xff00) >> 8); > - /* write to CTLR: divide counter lower byte */ > - uart->ubg2 = (counter & 0x00ff); > + mcf_serial_setbrg_common(uart, gd->baudrate); > +} > > - uart->ucr = UART_UCR_RESET_RX; > - uart->ucr = UART_UCR_RESET_TX; > +static int mcf_serial_tstc(void) > +{ > + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; > > - uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; > + return readb(&uart->usr) & UART_USR_RXRDY; > } > > static struct serial_device mcf_serial_drv = { > @@ -128,3 +153,83 @@ __weak struct serial_device *default_serial_console(void) > { > return &mcf_serial_drv; > } > + > +#endif > + > +#ifdef CONFIG_DM_SERIAL > + > +static int coldfire_serial_probe(struct udevice *dev) > +{ > + struct coldfire_serial_platdata *plat = dev->platdata; > + > + return mcf_serial_init_common((uart_t *)plat->base, > + plat->port, plat->baudrate); > +} > + > +static int coldfire_serial_putc(struct udevice *dev, const char ch) > +{ > + struct coldfire_serial_platdata *plat = dev->platdata; > + uart_t *uart = (uart_t *)plat->base; > + > + if (ch == '\n') > + serial_putc('\r'); This is done in the uclass; you can drop it. > + > + /* Wait for last character to go. */ > + while (!(readb(&uart->usr) & UART_USR_TXRDY)) > + ; You should not loop, just return -EAGAIN if not ready. > + > + writeb(ch, &uart->utb); > + > + return 0; > +} > + > +static int coldfire_serial_getc(struct udevice *dev) > +{ > + struct coldfire_serial_platdata *plat = dev->platdata; > + uart_t *uart = (uart_t *)(plat->base); > + > + /* Wait for a character to arrive. */ > + while (!(readb(&uart->usr) & UART_USR_RXRDY)) > + ; You should not loop, just return -EAGAIN if no bytes ready. > + > + return readb(&uart->urb); > +} > + > +int coldfire_serial_setbrg(struct udevice *dev, int baudrate) > +{ > + struct coldfire_serial_platdata *plat = dev->platdata; > + uart_t *uart = (uart_t *)(plat->base); > + > + mcf_serial_setbrg_common(uart, baudrate); > + > + return 0; > +} > + > +static int coldfire_serial_pending(struct udevice *dev, bool input) > +{ > + struct coldfire_serial_platdata *plat = dev->platdata; > + uart_t *uart = (uart_t *)(plat->base); > + > + if (input) > + return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0; > + else > + return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1; > + > + return 0; > +} > + > +static const struct dm_serial_ops coldfire_serial_ops = { > + .putc = coldfire_serial_putc, > + .pending = coldfire_serial_pending, > + .getc = coldfire_serial_getc, > + .setbrg = coldfire_serial_setbrg, > +}; > + > +U_BOOT_DRIVER(serial_coldfire) = { > + .name = "serial_coldfire", > + .id = UCLASS_SERIAL, > + .probe = coldfire_serial_probe, > + .ops = &coldfire_serial_ops, > + .flags = DM_FLAG_PRE_RELOC, > +}; > +#endif > diff --git a/include/dm/platform_data/serial_coldfire.h b/include/dm/platform_data/serial_coldfire.h > new file mode 100644 > index 0000000..fc1ad71 > --- /dev/null > +++ b/include/dm/platform_data/serial_coldfire.h > @@ -0,0 +1,23 @@ > +/* > + * Copyright (c) 2015 Angelo Dureghello <angelo@sysam.it> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef __serial_coldfire_h > +#define __serial_coldfire_h > + > +/* > + * struct coldfire_serial_platdata - information about a coldfire port > + * > + * @base: Uart port base register address > + * @port: Uart port index, for cpu with pinmux for uart / gpio > + * baudrtatre: Uart port baudrate > + */ > +struct coldfire_serial_platdata { > + unsigned long base; > + int port; > + int baudrate; > +}; > + > +#endif /* __serial_coldfire_h */ > -- > 2.5.3 > > Regards, Simon ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] m68k: add DM model serial driver 2015-12-19 20:29 ` Simon Glass @ 2015-12-19 22:32 ` Angelo Dureghello 2015-12-19 23:07 ` Simon Glass 0 siblings, 1 reply; 6+ messages in thread From: Angelo Dureghello @ 2015-12-19 22:32 UTC (permalink / raw) To: u-boot Hi Simon, On 19/12/2015 21:29, Simon Glass wrote: > Hi Angelo, > > On 19 December 2015 at 06:43, Angelo Dureghello <angelo@sysam.it> wrote: >> Boards can now use DM serial driver, or still legacy mcf uart >> driver version. >> Add DM-related changes for AMCORE board, to use as a tested example. >> >> Signed-off-by: Angelo Dureghello <angelo@sysam.it> >> --- >> >> board/sysam/amcore/amcore.c | 33 +++++ >> configs/amcore_defconfig | 2 + >> drivers/serial/mcfuart.c | 193 ++++++++++++++++++++++------- >> include/dm/platform_data/serial_coldfire.h | 23 ++++ >> 4 files changed, 207 insertions(+), 44 deletions(-) >> create mode 100644 include/dm/platform_data/serial_coldfire.h > > I suggest having the UART driver changes in one commit and your > updates for a particular board in the next. Ok > >> >> diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c >> index 42b7c23..523f374 100644 >> --- a/board/sysam/amcore/amcore.c >> +++ b/board/sysam/amcore/amcore.c >> @@ -9,6 +9,8 @@ >> */ >> >> #include <common.h> >> +#include <dm.h> >> +#include <dm/platform_data/serial_coldfire.h> >> #include <asm/immap.h> >> #include <asm/io.h> >> >> @@ -47,6 +49,26 @@ void fudelay(int usec) >> asm volatile ("nop"); >> } >> >> +/* >> + * allows a pre-console debug >> + * using some leds >> + */ >> +void debug_leds(unsigned short on) > > See DEBUG_UART which can provide access to an earlier UART. In any > case this function should probably be in a separate commit. > Ok >> +{ >> + sim_t *sim = (sim_t *)(MMAP_SIM); >> + gpio_t *gpio = (gpio_t *)(MMAP_GPIO); >> + unsigned short switch_on = on; >> + >> + out_be16(&sim->par, 0x0000); >> + out_be16(&gpio->paddr, 0xffff); >> + >> + switch_on = ~switch_on; >> + out_be16(&gpio->padat, switch_on); >> + >> + for (;;) >> + ; >> +} >> + >> phys_size_t initdram(int board_type) >> { >> u32 dramsize, RC; >> @@ -99,3 +121,14 @@ phys_size_t initdram(int board_type) >> >> return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); >> } >> + >> +static struct coldfire_serial_platdata mcf5307_serial_plat = { >> + .base = CONFIG_SYS_UART_BASE, >> + .port = 0, >> + .baudrate = CONFIG_BAUDRATE, >> +}; >> + >> +U_BOOT_DEVICE(coldfire_serial) = { >> + .name = "serial_coldfire", >> + .platdata = &mcf5307_serial_plat, >> +}; >> diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig >> index ad69f0a..0cadc03 100644 >> --- a/configs/amcore_defconfig >> +++ b/configs/amcore_defconfig >> @@ -1,6 +1,8 @@ >> CONFIG_M68K=y >> CONFIG_TARGET_AMCORE=y >> CONFIG_SYS_PROMPT="amcore $ " >> +CONFIG_DM=y >> +CONFIG_DM_SERIAL=y >> # CONFIG_CMD_BOOTD is not set >> # CONFIG_CMD_XIMG is not set >> # CONFIG_CMD_FPGA is not set >> diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c >> index 407354f..03a4d64 100644 >> --- a/drivers/serial/mcfuart.c >> +++ b/drivers/serial/mcfuart.c >> @@ -2,6 +2,9 @@ >> * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. >> * TsiChung Liew, Tsi-Chung.Liew at freescale.com. >> * >> + * Modified to add device model (DM) support >> + * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it> >> + * >> * SPDX-License-Identifier: GPL-2.0+ >> */ >> >> @@ -11,101 +14,123 @@ >> */ >> >> #include <common.h> >> +#include <dm.h> >> #include <serial.h> >> #include <linux/compiler.h> >> - >> #include <asm/immap.h> >> #include <asm/uart.h> >> +#ifdef CONFIG_DM_SERIAL > > Do you need this #ifdef? > Since CONFIG_DM_SERIAL is defined in board xxx_defconfig, it was to avoid to include dm/platform_data/serial_coldfire.h when CONFIG_DM_SERIAL is not defined. >> +# include <dm/platform_data/serial_coldfire.h> >> +#endif >> >> DECLARE_GLOBAL_DATA_PTR; >> >> extern void uart_port_conf(int port); >> >> -static int mcf_serial_init(void) >> +static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate) >> { >> - volatile uart_t *uart; >> u32 counter; >> >> - uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); >> - >> - uart_port_conf(CONFIG_SYS_UART_PORT); >> + uart_port_conf(port_idx); >> >> /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ >> - uart->ucr = UART_UCR_RESET_RX; >> - uart->ucr = UART_UCR_RESET_TX; >> - uart->ucr = UART_UCR_RESET_ERROR; >> - uart->ucr = UART_UCR_RESET_MR; >> + writeb(UART_UCR_RESET_RX, &uart->ucr); >> + writeb(UART_UCR_RESET_TX, &uart->ucr); >> + writeb(UART_UCR_RESET_ERROR, &uart->ucr); >> + writeb(UART_UCR_RESET_MR, &uart->ucr); >> __asm__("nop"); >> >> - uart->uimr = 0; >> + writeb(0, &uart->uimr); >> >> /* write to CSR: RX/TX baud rate from timers */ >> - uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK); >> + writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr); >> >> - uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE); >> - uart->umr = UART_UMR_SB_STOP_BITS_1; >> + writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); >> + writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); >> >> /* Setting up BaudRate */ >> - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); >> - counter = counter / gd->baudrate; >> + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); >> + counter = counter / baudrate; >> >> /* write to CTUR: divide counter upper byte */ >> - uart->ubg1 = (u8) ((counter & 0xff00) >> 8); >> + writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1); >> /* write to CTLR: divide counter lower byte */ >> - uart->ubg2 = (u8) (counter & 0x00ff); >> + writeb((u8)(counter & 0x00ff), &uart->ubg2); >> >> - uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED); >> + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); >> >> return (0); >> } >> >> +static void mcf_serial_setbrg_common(uart_t *uart, int baudrate) >> +{ >> + u32 counter; >> + >> + /* Setting up BaudRate */ >> + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); >> + counter = counter / baudrate; >> + >> + /* write to CTUR: divide counter upper byte */ >> + writeb(((counter & 0xff00) >> 8), &uart->ubg1); >> + /* write to CTLR: divide counter lower byte */ >> + writeb((counter & 0x00ff), &uart->ubg2); >> + >> + writeb(UART_UCR_RESET_RX, &uart->ucr); >> + writeb(UART_UCR_RESET_TX, &uart->ucr); >> + >> + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); >> +} >> + >> +#ifndef CONFIG_DM_SERIAL >> + >> +static int mcf_serial_init(void) >> +{ >> + uart_t *uart_base; >> + int port_idx; >> + >> + uart_base = (uart_t *)CONFIG_SYS_UART_BASE; >> + port_idx = CONFIG_SYS_UART_PORT; >> + >> + return mcf_serial_init_common(uart_base, port_idx, gd->baudrate); >> +} >> + >> static void mcf_serial_putc(const char c) >> { >> - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); >> + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; >> >> if (c == '\n') >> serial_putc('\r'); >> >> /* Wait for last character to go. */ >> - while (!(uart->usr & UART_USR_TXRDY)) ; >> + while (!(readb(&uart->usr) & UART_USR_TXRDY)) >> + ; >> >> - uart->utb = c; >> + writeb(c, &uart->utb); >> } >> >> static int mcf_serial_getc(void) >> { >> - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); >> + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; >> >> /* Wait for a character to arrive. */ >> - while (!(uart->usr & UART_USR_RXRDY)) ; >> - return uart->urb; >> -} >> + while (!(readb(&uart->usr) & UART_USR_RXRDY)) >> + ; >> >> -static int mcf_serial_tstc(void) >> -{ >> - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); >> - >> - return (uart->usr & UART_USR_RXRDY); >> + return readb(&uart->urb); >> } >> >> static void mcf_serial_setbrg(void) >> { >> - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); >> - u32 counter; >> + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; >> >> - /* Setting up BaudRate */ >> - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); >> - counter = counter / gd->baudrate; >> - >> - /* write to CTUR: divide counter upper byte */ >> - uart->ubg1 = ((counter & 0xff00) >> 8); >> - /* write to CTLR: divide counter lower byte */ >> - uart->ubg2 = (counter & 0x00ff); >> + mcf_serial_setbrg_common(uart, gd->baudrate); >> +} >> >> - uart->ucr = UART_UCR_RESET_RX; >> - uart->ucr = UART_UCR_RESET_TX; >> +static int mcf_serial_tstc(void) >> +{ >> + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; >> >> - uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; >> + return readb(&uart->usr) & UART_USR_RXRDY; >> } >> >> static struct serial_device mcf_serial_drv = { >> @@ -128,3 +153,83 @@ __weak struct serial_device *default_serial_console(void) >> { >> return &mcf_serial_drv; >> } >> + >> +#endif >> + >> +#ifdef CONFIG_DM_SERIAL >> + >> +static int coldfire_serial_probe(struct udevice *dev) >> +{ >> + struct coldfire_serial_platdata *plat = dev->platdata; >> + >> + return mcf_serial_init_common((uart_t *)plat->base, >> + plat->port, plat->baudrate); >> +} >> + >> +static int coldfire_serial_putc(struct udevice *dev, const char ch) >> +{ >> + struct coldfire_serial_platdata *plat = dev->platdata; >> + uart_t *uart = (uart_t *)plat->base; >> + >> + if (ch == '\n') >> + serial_putc('\r'); > > This is done in the uclass; you can drop it. > Ok >> + >> + /* Wait for last character to go. */ >> + while (!(readb(&uart->usr) & UART_USR_TXRDY)) >> + ; > > You should not loop, just return -EAGAIN if not ready. Ok > >> + >> + writeb(ch, &uart->utb); >> + >> + return 0; >> +} >> + >> +static int coldfire_serial_getc(struct udevice *dev) >> +{ >> + struct coldfire_serial_platdata *plat = dev->platdata; >> + uart_t *uart = (uart_t *)(plat->base); >> + >> + /* Wait for a character to arrive. */ >> + while (!(readb(&uart->usr) & UART_USR_RXRDY)) >> + ; > > You should not loop, just return -EAGAIN if no bytes ready. > Ok >> + >> + return readb(&uart->urb); >> +} >> + >> +int coldfire_serial_setbrg(struct udevice *dev, int baudrate) >> +{ >> + struct coldfire_serial_platdata *plat = dev->platdata; >> + uart_t *uart = (uart_t *)(plat->base); >> + >> + mcf_serial_setbrg_common(uart, baudrate); >> + >> + return 0; >> +} >> + >> +static int coldfire_serial_pending(struct udevice *dev, bool input) >> +{ >> + struct coldfire_serial_platdata *plat = dev->platdata; >> + uart_t *uart = (uart_t *)(plat->base); >> + >> + if (input) >> + return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0; >> + else >> + return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1; >> + >> + return 0; >> +} >> + >> +static const struct dm_serial_ops coldfire_serial_ops = { >> + .putc = coldfire_serial_putc, >> + .pending = coldfire_serial_pending, >> + .getc = coldfire_serial_getc, >> + .setbrg = coldfire_serial_setbrg, >> +}; >> + >> +U_BOOT_DRIVER(serial_coldfire) = { >> + .name = "serial_coldfire", >> + .id = UCLASS_SERIAL, >> + .probe = coldfire_serial_probe, >> + .ops = &coldfire_serial_ops, >> + .flags = DM_FLAG_PRE_RELOC, >> +}; >> +#endif >> diff --git a/include/dm/platform_data/serial_coldfire.h b/include/dm/platform_data/serial_coldfire.h >> new file mode 100644 >> index 0000000..fc1ad71 >> --- /dev/null >> +++ b/include/dm/platform_data/serial_coldfire.h >> @@ -0,0 +1,23 @@ >> +/* >> + * Copyright (c) 2015 Angelo Dureghello <angelo@sysam.it> >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> + >> +#ifndef __serial_coldfire_h >> +#define __serial_coldfire_h >> + >> +/* >> + * struct coldfire_serial_platdata - information about a coldfire port >> + * >> + * @base: Uart port base register address >> + * @port: Uart port index, for cpu with pinmux for uart / gpio >> + * baudrtatre: Uart port baudrate >> + */ >> +struct coldfire_serial_platdata { >> + unsigned long base; >> + int port; >> + int baudrate; >> +}; >> + >> +#endif /* __serial_coldfire_h */ >> -- >> 2.5.3 >> >> > > Regards, > Simon > Regards, Angelo ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] m68k: add DM model serial driver 2015-12-19 22:32 ` Angelo Dureghello @ 2015-12-19 23:07 ` Simon Glass 0 siblings, 0 replies; 6+ messages in thread From: Simon Glass @ 2015-12-19 23:07 UTC (permalink / raw) To: u-boot Hi Angelo, On 19 December 2015 at 15:32, Angelo Dureghello <angelo@sysam.it> wrote: > Hi Simon, > > On 19/12/2015 21:29, Simon Glass wrote: >> >> Hi Angelo, >> >> On 19 December 2015 at 06:43, Angelo Dureghello <angelo@sysam.it> wrote: >>> >>> Boards can now use DM serial driver, or still legacy mcf uart >>> driver version. >>> Add DM-related changes for AMCORE board, to use as a tested example. >>> >>> Signed-off-by: Angelo Dureghello <angelo@sysam.it> >>> --- >>> >>> board/sysam/amcore/amcore.c | 33 +++++ >>> configs/amcore_defconfig | 2 + >>> drivers/serial/mcfuart.c | 193 >>> ++++++++++++++++++++++------- >>> include/dm/platform_data/serial_coldfire.h | 23 ++++ >>> 4 files changed, 207 insertions(+), 44 deletions(-) >>> create mode 100644 include/dm/platform_data/serial_coldfire.h >> [snip] >>> diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c >>> index 407354f..03a4d64 100644 >>> --- a/drivers/serial/mcfuart.c >>> +++ b/drivers/serial/mcfuart.c >>> @@ -2,6 +2,9 @@ >>> * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. >>> * TsiChung Liew, Tsi-Chung.Liew at freescale.com. >>> * >>> + * Modified to add device model (DM) support >>> + * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it> >>> + * >>> * SPDX-License-Identifier: GPL-2.0+ >>> */ >>> >>> @@ -11,101 +14,123 @@ >>> */ >>> >>> #include <common.h> >>> +#include <dm.h> >>> #include <serial.h> >>> #include <linux/compiler.h> >>> - >>> #include <asm/immap.h> >>> #include <asm/uart.h> >>> +#ifdef CONFIG_DM_SERIAL >> >> >> Do you need this #ifdef? >> > > Since CONFIG_DM_SERIAL is defined in board xxx_defconfig, > it was to avoid to include dm/platform_data/serial_coldfire.h > when CONFIG_DM_SERIAL is not defined. I don't think that matters. Anyway the non-DM code will go away soon. [snip] Regards, Simon ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc 2015-12-19 13:43 [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc Angelo Dureghello 2015-12-19 13:43 ` [U-Boot] [PATCH 2/2] m68k: add DM model serial driver Angelo Dureghello @ 2015-12-19 20:29 ` Simon Glass 1 sibling, 0 replies; 6+ messages in thread From: Simon Glass @ 2015-12-19 20:29 UTC (permalink / raw) To: u-boot On 19 December 2015 at 06:43, Angelo Dureghello <angelo@sysam.it> wrote: > To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. > So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and > call to board_init_f_mem() is added for all cpu's. > > Signed-off-by: Angelo Dureghello <angelo@sysam.it> > --- > > arch/m68k/cpu/mcf5227x/start.S | 8 ++++++++ > arch/m68k/cpu/mcf523x/start.S | 8 ++++++++ > arch/m68k/cpu/mcf52x2/start.S | 8 ++++++++ > arch/m68k/cpu/mcf530x/cpu_init.c | 2 +- > arch/m68k/cpu/mcf530x/start.S | 8 ++++++++ > arch/m68k/cpu/mcf532x/start.S | 8 ++++++++ > arch/m68k/cpu/mcf5445x/start.S | 8 ++++++++ > arch/m68k/cpu/mcf547x_8x/start.S | 8 ++++++++ > arch/m68k/include/asm/config.h | 2 -- > 9 files changed, 57 insertions(+), 3 deletions(-) Reviewed-by: Simon Glass <sjg@chromium.org> ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-12-19 23:07 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-12-19 13:43 [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc Angelo Dureghello 2015-12-19 13:43 ` [U-Boot] [PATCH 2/2] m68k: add DM model serial driver Angelo Dureghello 2015-12-19 20:29 ` Simon Glass 2015-12-19 22:32 ` Angelo Dureghello 2015-12-19 23:07 ` Simon Glass 2015-12-19 20:29 ` [U-Boot] [PATCH 1/2] m68k: add malloc memory for early malloc Simon Glass
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