From: Rongrong Zou <zourongrong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Rongrong Zou
<zourongrong-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: minyard-HInyCGIudOg@public.gmane.org,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v1 3/3] ARM64 LPC: update binding doc
Date: Thu, 31 Dec 2015 22:12:19 +0800 [thread overview]
Message-ID: <568537C3.3060902@huawei.com> (raw)
In-Reply-To: <1899302.RWIn6Bg3Dr@wuerfel>
Sorry for so late reply, it is difficult for me to understand ISA config :( .
在 2015/12/30 17:06, Arnd Bergmann 写道:
> On Tuesday 29 December 2015 21:33:52 Rongrong Zou wrote:
>> Signed-off-by: Rongrong Zou <zourongrong-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>> .../devicetree/bindings/arm64/low-pin-count.txt | 20 ++++++++++++++++++++
>> 1 file changed, 20 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/arm64/low-pin-count.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm64/low-pin-count.txt b/Documentation/devicetree/bindings/arm64/low-pin-count.txt
>> new file mode 100644
>> index 0000000..215f2c4
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm64/low-pin-count.txt
>> @@ -0,0 +1,20 @@
>> +Low Pin Count bus driver
>> +
>> +Usually LPC controller is part of PCI host bridge, so the legacy ISA
>> +port locate on LPC bus can be accessed directly. But some SoC have
>> +independent LPC controller, and we can access the legacy port by specifying
>> +LPC address cycle. Thus, LPC driver is introduced.
>> +
>> +Required properties:
>> +- compatible: "low-pin-count"
>> +- reg: specifies low pin count address range
>> +
>> +
>> +Example:
>> +
>> + lpc_0: lpc@a01b0000 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "low-pin-count";
>> + reg = <0x0 0xa01b0000 0x0 0x10000>;
>> + };
>
> One more thought: please try to stick as closely as possible to the existing
> ISA binding that is documented at
>
> http://www.firmware.org/1275/bindings/isa/isa0_4d.ps
From the specification, I think I should use 2 32bit integer to describe the isa addr in dts.
>
> In particular, this should cover the possibility of describing both memory
> and I/O spaces in child devices.
>
I found below config in powerpc dts "arch/powerpc/boot/dts/mpc8544ds.dts"
isa@1e {
device_type = "isa";
#interrupt-cells = <2>;
#size-cells = <1>;
#address-cells = <2>;
reg = <0xf000 0x0 0x0 0x0 0x0>;
ranges = <0x1 0x0 0x1000000 0x0 0x0
0x1000>;
interrupt-parent = <&i8259>;
rtc@70 {
compatible = "pnpPNP,b00";
reg = <0x1 0x70 0x2>;
};
the isa space in child-node: reg = <0x1 0x70 0x2>;
0x1 means IO space, 70 means addr, 0x2 is size.
but when i config the following in dts, the ipmi_0 node can't be probed,
I think there may be some problems.
lpc_0: lpc@a01b0000 {
compatible = "low-pin-count";
device_type = "isa";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x0 0xa01b0000 0x0 0x10000>;
ipmi_0:ipmi@000000e4{
device_type = "ipmi";
compatible = "ipmi-bt";
reg = <0x1 0x000000e4 0x4>;
};
> Arnd
> _______________________________________________
> linuxarm mailing list
> linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
> http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm
>
>
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WARNING: multiple messages have this Message-ID (diff)
From: Rongrong Zou <zourongrong@huawei.com>
To: Arnd Bergmann <arnd@arndb.de>, Rongrong Zou <zourongrong@gmail.com>
Cc: <minyard@acm.org>, <gregkh@linuxfoundation.org>,
<catalin.marinas@arm.com>, <will.deacon@arm.com>,
<linuxarm@huawei.com>, <linux-kernel@vger.kernel.org>,
<benh@kernel.crashing.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v1 3/3] ARM64 LPC: update binding doc
Date: Thu, 31 Dec 2015 22:12:19 +0800 [thread overview]
Message-ID: <568537C3.3060902@huawei.com> (raw)
In-Reply-To: <1899302.RWIn6Bg3Dr@wuerfel>
Sorry for so late reply, it is difficult for me to understand ISA config :( .
在 2015/12/30 17:06, Arnd Bergmann 写道:
> On Tuesday 29 December 2015 21:33:52 Rongrong Zou wrote:
>> Signed-off-by: Rongrong Zou <zourongrong@gmail.com>
>> ---
>> .../devicetree/bindings/arm64/low-pin-count.txt | 20 ++++++++++++++++++++
>> 1 file changed, 20 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/arm64/low-pin-count.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm64/low-pin-count.txt b/Documentation/devicetree/bindings/arm64/low-pin-count.txt
>> new file mode 100644
>> index 0000000..215f2c4
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm64/low-pin-count.txt
>> @@ -0,0 +1,20 @@
>> +Low Pin Count bus driver
>> +
>> +Usually LPC controller is part of PCI host bridge, so the legacy ISA
>> +port locate on LPC bus can be accessed directly. But some SoC have
>> +independent LPC controller, and we can access the legacy port by specifying
>> +LPC address cycle. Thus, LPC driver is introduced.
>> +
>> +Required properties:
>> +- compatible: "low-pin-count"
>> +- reg: specifies low pin count address range
>> +
>> +
>> +Example:
>> +
>> + lpc_0: lpc@a01b0000 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "low-pin-count";
>> + reg = <0x0 0xa01b0000 0x0 0x10000>;
>> + };
>
> One more thought: please try to stick as closely as possible to the existing
> ISA binding that is documented at
>
> http://www.firmware.org/1275/bindings/isa/isa0_4d.ps
From the specification, I think I should use 2 32bit integer to describe the isa addr in dts.
>
> In particular, this should cover the possibility of describing both memory
> and I/O spaces in child devices.
>
I found below config in powerpc dts "arch/powerpc/boot/dts/mpc8544ds.dts"
isa@1e {
device_type = "isa";
#interrupt-cells = <2>;
#size-cells = <1>;
#address-cells = <2>;
reg = <0xf000 0x0 0x0 0x0 0x0>;
ranges = <0x1 0x0 0x1000000 0x0 0x0
0x1000>;
interrupt-parent = <&i8259>;
rtc@70 {
compatible = "pnpPNP,b00";
reg = <0x1 0x70 0x2>;
};
the isa space in child-node: reg = <0x1 0x70 0x2>;
0x1 means IO space, 70 means addr, 0x2 is size.
but when i config the following in dts, the ipmi_0 node can't be probed,
I think there may be some problems.
lpc_0: lpc@a01b0000 {
compatible = "low-pin-count";
device_type = "isa";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x0 0xa01b0000 0x0 0x10000>;
ipmi_0:ipmi@000000e4{
device_type = "ipmi";
compatible = "ipmi-bt";
reg = <0x1 0x000000e4 0x4>;
};
> Arnd
> _______________________________________________
> linuxarm mailing list
> linuxarm@huawei.com
> http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm
>
>
next prev parent reply other threads:[~2015-12-31 14:12 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-29 13:33 [PATCH v1 0/3] ARM64 LPC: legacy ISA I/O support Rongrong Zou
2015-12-29 13:33 ` [PATCH v1 1/3] ARM64 LPC: indirect ISA PORT IO introduced Rongrong Zou
2015-12-29 13:47 ` Arnd Bergmann
2015-12-29 14:26 ` Rongrong Zou
2015-12-29 14:35 ` Arnd Bergmann
2015-12-30 1:24 ` Rongrong Zou
2015-12-30 8:59 ` Arnd Bergmann
2015-12-30 9:28 ` Rongrong Zou
2015-12-30 9:42 ` Arnd Bergmann
2016-01-04 10:11 ` Will Deacon
2016-01-04 10:27 ` Rongrong Zou
2016-01-04 10:27 ` Rongrong Zou
2015-12-29 13:33 ` [PATCH v1 2/3] ARM64 LPC: LPC driver implementation Rongrong Zou
2015-12-29 13:51 ` Arnd Bergmann
2015-12-29 14:03 ` Rongrong Zou
2015-12-29 14:11 ` Arnd Bergmann
2015-12-29 13:33 ` [PATCH v1 3/3] ARM64 LPC: update binding doc Rongrong Zou
2015-12-29 13:52 ` Arnd Bergmann
2015-12-30 9:06 ` Arnd Bergmann
2015-12-31 14:12 ` Rongrong Zou [this message]
2015-12-31 14:12 ` Rongrong Zou
2015-12-31 14:40 ` Arnd Bergmann
[not found] ` <CABTftiT1+AmrNjiAie-T6on-oWA4Zz73+Tj2pQrixMT3o475uw@mail.gmail.com>
2016-01-03 12:24 ` Rongrong Zou
2016-01-03 12:24 ` Rongrong Zou
2016-01-03 12:24 ` Rongrong Zou
2016-01-04 11:13 ` Arnd Bergmann
2016-01-04 11:13 ` Arnd Bergmann
2016-01-04 11:13 ` Arnd Bergmann
2016-01-04 16:04 ` Rongrong Zou
2016-01-04 16:04 ` Rongrong Zou
2016-01-04 16:04 ` Rongrong Zou
2016-01-04 16:34 ` Arnd Bergmann
2016-01-04 16:34 ` Arnd Bergmann
2016-01-04 16:34 ` Arnd Bergmann
2016-01-05 11:59 ` Rongrong Zou
2016-01-05 11:59 ` Rongrong Zou
2016-01-05 11:59 ` Rongrong Zou
2016-01-05 12:19 ` Arnd Bergmann
2016-01-05 12:19 ` Arnd Bergmann
2016-01-06 13:36 ` Rongrong Zou
2016-01-06 13:36 ` Rongrong Zou
2016-01-06 13:36 ` Rongrong Zou
2016-01-07 3:37 ` Rongrong Zou
2016-01-07 3:37 ` Rongrong Zou
2016-01-07 3:37 ` Rongrong Zou
2016-01-10 9:29 ` Rolland Chau
2016-01-10 9:29 ` Rolland Chau
2016-01-10 13:38 ` Rongrong Zou
2016-01-10 13:38 ` Rongrong Zou
2016-01-10 13:38 ` Rongrong Zou
2016-01-11 16:14 ` liviu.dudau at arm.com
2016-01-11 16:14 ` liviu.dudau
2016-01-11 16:14 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 2:39 ` Rongrong Zou
2016-01-12 2:39 ` Rongrong Zou
2016-01-12 9:07 ` liviu.dudau at arm.com
2016-01-12 9:07 ` liviu.dudau
2016-01-12 9:25 ` Rongrong Zou
2016-01-12 9:25 ` Rongrong Zou
2016-01-12 9:25 ` Rongrong Zou
2016-01-12 10:14 ` liviu.dudau at arm.com
2016-01-12 10:14 ` liviu.dudau
2016-01-12 11:05 ` Rongrong Zou
2016-01-12 11:05 ` Rongrong Zou
2016-01-12 11:05 ` Rongrong Zou
2016-01-12 11:27 ` liviu.dudau at arm.com
2016-01-12 11:27 ` liviu.dudau
2016-01-12 11:27 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 11:56 ` Rongrong Zou
2016-01-12 11:56 ` Rongrong Zou
2016-01-12 11:56 ` Rongrong Zou
2016-01-12 15:13 ` liviu.dudau at arm.com
2016-01-12 15:13 ` liviu.dudau
2016-01-12 15:13 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 22:52 ` Arnd Bergmann
2016-01-12 22:52 ` Arnd Bergmann
2016-01-13 5:53 ` Benjamin Herrenschmidt
2016-01-13 5:53 ` Benjamin Herrenschmidt
2016-01-13 5:53 ` Benjamin Herrenschmidt
2016-01-13 6:34 ` Rongrong Zou
2016-01-13 6:34 ` Rongrong Zou
2016-01-13 6:34 ` Rongrong Zou
2016-01-13 9:26 ` Arnd Bergmann
2016-01-13 9:26 ` Arnd Bergmann
2016-01-13 9:26 ` Arnd Bergmann
2016-01-13 10:10 ` liviu.dudau at arm.com
2016-01-13 10:10 ` liviu.dudau
2016-01-13 10:10 ` liviu.dudau-5wv7dgnIgG8
2016-01-13 10:18 ` Arnd Bergmann
2016-01-13 10:18 ` Arnd Bergmann
2016-01-13 10:32 ` liviu.dudau at arm.com
2016-01-13 10:32 ` liviu.dudau
2016-01-13 10:32 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 22:54 ` Arnd Bergmann
2016-01-12 22:54 ` Arnd Bergmann
2016-01-13 10:09 ` liviu.dudau at arm.com
2016-01-13 10:09 ` liviu.dudau
2016-01-13 10:09 ` liviu.dudau-5wv7dgnIgG8
2016-01-13 10:29 ` Arnd Bergmann
2016-01-13 10:29 ` Arnd Bergmann
2016-01-13 10:29 ` Arnd Bergmann
2016-01-13 11:06 ` Rongrong Zou
2016-01-13 11:06 ` Rongrong Zou
2016-01-13 11:25 ` liviu.dudau at arm.com
2016-01-13 11:25 ` liviu.dudau
2016-01-13 23:29 ` Benjamin Herrenschmidt
2016-01-14 2:03 ` Rongrong Zou
2016-01-14 3:39 ` Benjamin Herrenschmidt
2016-01-14 4:42 ` Rongrong Zou
2016-01-14 11:25 ` Benjamin Herrenschmidt
2016-01-14 13:11 ` Rongrong Zou
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