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From: Marc Zyngier <marc.zyngier@arm.com>
To: Thomas Gleixner <tglx@linutronix.de>, Quan Nguyen <qnguyen@apm.com>
Cc: linus.walleij@linaro.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Jason Cooper <jason@lakedaemon.net>, Y Vo <yvo@apm.com>,
	Phong Vo <pvo@apm.com>, Loc Ho <lho@apm.com>,
	Feng Kan <fkan@apm.com>, Duc Dang <dhdang@apm.com>,
	patches@apm.com
Subject: Re: [PATCH v3 1/3] gpio: xgene: Enable X-Gene standby GPIO as interrupt controller
Date: Fri, 08 Jan 2016 09:07:50 +0000	[thread overview]
Message-ID: <568F7C66.2050000@arm.com> (raw)
In-Reply-To: <alpine.DEB.2.11.1601080942270.3575@nanos>

On 08/01/16 08:45, Thomas Gleixner wrote:
> On Thu, 7 Jan 2016, Quan Nguyen wrote:
>> -static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
>> +static void xgene_gpio_sb_irq_ack(struct irq_data *d)
>> +{
>> +	struct irq_data *irqdata;
>> +	struct xgene_gpio_sb *priv = irq_data_get_irq_chip_data(d);
>> +
>> +	irqdata = irq_get_irq_data(priv->gic_virq[d->hwirq]);
>> +	if (!irqdata || !irqdata->chip)
>> +		return;
> 
> What the heck is this? Why are you looking up some random other irq and fiddle
> with its irq chip?
> 
> This is a 1:1 mapping from your gpio irq to a gic irq. We have hierarchical
> interrupt domains for this.

I've said the exact same thing back in October:

http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/381996.html

but obviously I wasn't clear enough...

	M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/3] gpio: xgene: Enable X-Gene standby GPIO as interrupt controller
Date: Fri, 08 Jan 2016 09:07:50 +0000	[thread overview]
Message-ID: <568F7C66.2050000@arm.com> (raw)
In-Reply-To: <alpine.DEB.2.11.1601080942270.3575@nanos>

On 08/01/16 08:45, Thomas Gleixner wrote:
> On Thu, 7 Jan 2016, Quan Nguyen wrote:
>> -static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
>> +static void xgene_gpio_sb_irq_ack(struct irq_data *d)
>> +{
>> +	struct irq_data *irqdata;
>> +	struct xgene_gpio_sb *priv = irq_data_get_irq_chip_data(d);
>> +
>> +	irqdata = irq_get_irq_data(priv->gic_virq[d->hwirq]);
>> +	if (!irqdata || !irqdata->chip)
>> +		return;
> 
> What the heck is this? Why are you looking up some random other irq and fiddle
> with its irq chip?
> 
> This is a 1:1 mapping from your gpio irq to a gic irq. We have hierarchical
> interrupt domains for this.

I've said the exact same thing back in October:

http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/381996.html

but obviously I wasn't clear enough...

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2016-01-08  9:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-07 10:27 [PATCH v3 0/3] Enable X-Gene standby GPIO as interrupt controller Quan Nguyen
2016-01-07 10:27 ` Quan Nguyen
2016-01-07 10:27 ` [PATCH v3 1/3] gpio: xgene: " Quan Nguyen
2016-01-07 10:27   ` Quan Nguyen
2016-01-08  8:45   ` Thomas Gleixner
2016-01-08  8:45     ` Thomas Gleixner
2016-01-08  9:07     ` Marc Zyngier [this message]
2016-01-08  9:07       ` Marc Zyngier
     [not found] ` <1452162428-26839-1-git-send-email-qnguyen-qTEPVZfXA3Y@public.gmane.org>
2016-01-07 10:27   ` [PATCH v3 2/3] Documentation: gpio: Update description for X-Gene standby GPIO controller DTS binding Quan Nguyen
2016-01-07 10:27     ` Quan Nguyen
2016-01-09 22:28     ` Rob Herring
2016-01-09 22:28       ` Rob Herring
2016-01-07 10:27 ` [PATCH v3 3/3] arm64: dts: Update X-Gene standby GPIO controller DTS entries Quan Nguyen
2016-01-07 10:27   ` Quan Nguyen

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