From: Timur Tabi <timur@tabi.org>
To: Mark Brown <broonie@kernel.org>
Cc: "Maciej S. Szmigiero" <mail@maciej.szmigiero.name>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
Xiubo Li <Xiubo.Lee@gmail.com>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
Liam Girdwood <lgirdwood@gmail.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Fabio Estevam <festevam@gmail.com>
Subject: Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults
Date: Mon, 11 Jan 2016 19:53:43 -0600 [thread overview]
Message-ID: <56945CA7.70100@tabi.org> (raw)
In-Reply-To: <20160112013421.GW6588@sirena.org.uk>
Mark Brown wrote:
> Quite possibly (it'll be more efficient and it's intended for such use
> cases) but as I said in my other reply that then has the issue that it
> implicitly gives default values to all the registers so I'd expect we
> still need to handle the cache initialisation explicitly (or
> alternatively the hardware sync with the cache on startup).
Why does REGCACHE_FLAT assume that all registers have a default value of
0? Shouldn't it have the same behavior w.r.t. cache values as
REGCACHE_RBTREE?
WARNING: multiple messages have this Message-ID (diff)
From: Timur Tabi <timur@tabi.org>
To: Mark Brown <broonie@kernel.org>
Cc: "Maciej S. Szmigiero" <mail@maciej.szmigiero.name>,
Fabio Estevam <festevam@gmail.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults
Date: Mon, 11 Jan 2016 19:53:43 -0600 [thread overview]
Message-ID: <56945CA7.70100@tabi.org> (raw)
In-Reply-To: <20160112013421.GW6588@sirena.org.uk>
Mark Brown wrote:
> Quite possibly (it'll be more efficient and it's intended for such use
> cases) but as I said in my other reply that then has the issue that it
> implicitly gives default values to all the registers so I'd expect we
> still need to handle the cache initialisation explicitly (or
> alternatively the hardware sync with the cache on startup).
Why does REGCACHE_FLAT assume that all registers have a default value of
0? Shouldn't it have the same behavior w.r.t. cache values as
REGCACHE_RBTREE?
next prev parent reply other threads:[~2016-01-12 1:53 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-20 20:33 [PATCH 3/3] ASoC: fsl_ssi: remove register defaults Maciej S. Szmigiero
2015-12-23 13:13 ` Fabio Estevam
2016-01-10 12:22 ` Applied "ASoC: fsl_ssi: remove register defaults" to the asoc tree Mark Brown
2016-01-10 21:36 ` [PATCH 3/3] ASoC: fsl_ssi: remove register defaults Timur Tabi
2016-01-11 12:04 ` Fabio Estevam
2016-01-11 12:10 ` Fabio Estevam
2016-01-11 13:57 ` Maciej S. Szmigiero
2016-01-11 14:05 ` Fabio Estevam
2016-01-16 23:56 ` Maciej S. Szmigiero
2016-01-16 23:56 ` Maciej S. Szmigiero
2016-01-17 0:10 ` Timur Tabi
2016-01-17 1:01 ` Maciej S. Szmigiero
2016-01-17 1:01 ` Maciej S. Szmigiero
2016-01-17 5:16 ` Timur Tabi
2016-01-17 5:16 ` Timur Tabi
2016-01-17 14:16 ` Maciej S. Szmigiero
2016-01-17 14:39 ` Maciej S. Szmigiero
2016-01-17 14:39 ` Maciej S. Szmigiero
2016-01-17 18:38 ` Timur Tabi
2016-01-17 18:38 ` Timur Tabi
2016-01-17 22:02 ` Maciej S. Szmigiero
2016-01-17 22:02 ` Maciej S. Szmigiero
2016-01-18 12:51 ` Fabio Estevam
2016-01-18 19:08 ` Maciej S. Szmigiero
2016-01-27 18:37 ` Applied "ASoC: fsl_ssi: remove explicit register defaults" to the asoc tree Mark Brown
2016-02-22 3:14 ` Mark Brown
2016-01-11 14:00 ` [PATCH 3/3] ASoC: fsl_ssi: remove register defaults Mark Brown
2016-01-11 14:10 ` Maciej S. Szmigiero
2016-01-11 14:54 ` Mark Brown
2016-01-11 15:45 ` Timur Tabi
2016-01-11 16:12 ` Mark Brown
2016-01-12 1:23 ` Timur Tabi
2016-01-12 1:34 ` Mark Brown
2016-01-12 1:53 ` Timur Tabi [this message]
2016-01-12 1:53 ` Timur Tabi
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