From: xuejiancheng <xuejiancheng@huawei.com>
To: Rob Herring <robh@kernel.org>
Cc: <mturquette@baylibre.com>, <sboyd@codeaurora.org>,
<p.zabel@pengutronix.de>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <linux@arm.linux.org.uk>,
<khilman@linaro.org>, <arnd@arndb.de>, <olof@lixom.net>,
<xuwei5@hisilicon.com>, <haojian.zhuang@linaro.org>,
<zhangfei.gao@linaro.org>, <bintian.wang@huawei.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<yanhaifeng@hisilicon.com>, <yanghongwei@hisilicon.com>,
<suwenping@hisilicon.com>, <raojun@hisilicon.com>,
<ml.yang@hisilicon.com>, <gaofei@hisilicon.com>,
<zhangzhenxing@hisilicon.com>, <xuejiancheng@hisilicon.com>
Subject: Re: [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc
Date: Wed, 20 Jan 2016 09:43:10 +0800 [thread overview]
Message-ID: <569EE62E.3040003@huawei.com> (raw)
In-Reply-To: <20160119182317.GA3681@rob-hp-laptop>
On 2016/1/20 2:23, Rob Herring wrote:
> On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote:
>> The CRG(Clock and Reset Generator) block provides clock
>> and reset signals for other modules in hi3519 soc.
>>
>> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
>> ---
>> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++
>
> I already acked this. Please add ack's when posting new versions.
>
> Acked-by: Rob Herring <robh@kernel.org>
>
Hi Rob,
I see. Thank you very much.
Regards,
Jiancheng
>> drivers/clk/hisilicon/Kconfig | 7 ++
>> drivers/clk/hisilicon/Makefile | 2 +
>> drivers/clk/hisilicon/clk-hi3519.c | 132 +++++++++++++++++++++
>> drivers/clk/hisilicon/clk.c | 23 ++--
>> drivers/clk/hisilicon/clk.h | 14 +--
>> drivers/clk/hisilicon/reset.c | 130 ++++++++++++++++++++
>> drivers/clk/hisilicon/reset.h | 32 +++++
>> include/dt-bindings/clock/hi3519-clock.h | 40 +++++++
>> 9 files changed, 411 insertions(+), 15 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt
>> create mode 100644 drivers/clk/hisilicon/clk-hi3519.c
>> create mode 100644 drivers/clk/hisilicon/reset.c
>> create mode 100644 drivers/clk/hisilicon/reset.h
>> create mode 100644 include/dt-bindings/clock/hi3519-clock.h
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: xuejiancheng@huawei.com (xuejiancheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc
Date: Wed, 20 Jan 2016 09:43:10 +0800 [thread overview]
Message-ID: <569EE62E.3040003@huawei.com> (raw)
In-Reply-To: <20160119182317.GA3681@rob-hp-laptop>
On 2016/1/20 2:23, Rob Herring wrote:
> On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote:
>> The CRG(Clock and Reset Generator) block provides clock
>> and reset signals for other modules in hi3519 soc.
>>
>> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
>> ---
>> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++
>
> I already acked this. Please add ack's when posting new versions.
>
> Acked-by: Rob Herring <robh@kernel.org>
>
Hi Rob,
I see. Thank you very much.
Regards,
Jiancheng
>> drivers/clk/hisilicon/Kconfig | 7 ++
>> drivers/clk/hisilicon/Makefile | 2 +
>> drivers/clk/hisilicon/clk-hi3519.c | 132 +++++++++++++++++++++
>> drivers/clk/hisilicon/clk.c | 23 ++--
>> drivers/clk/hisilicon/clk.h | 14 +--
>> drivers/clk/hisilicon/reset.c | 130 ++++++++++++++++++++
>> drivers/clk/hisilicon/reset.h | 32 +++++
>> include/dt-bindings/clock/hi3519-clock.h | 40 +++++++
>> 9 files changed, 411 insertions(+), 15 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt
>> create mode 100644 drivers/clk/hisilicon/clk-hi3519.c
>> create mode 100644 drivers/clk/hisilicon/reset.c
>> create mode 100644 drivers/clk/hisilicon/reset.h
>> create mode 100644 include/dt-bindings/clock/hi3519-clock.h
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: xuejiancheng <xuejiancheng@huawei.com>
To: Rob Herring <robh@kernel.org>
Cc: mturquette@baylibre.com, sboyd@codeaurora.org,
p.zabel@pengutronix.de, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, khilman@linaro.org, arnd@arndb.de,
olof@lixom.net, xuwei5@hisilicon.com, haojian.zhuang@linaro.org,
zhangfei.gao@linaro.org, bintian.wang@huawei.com,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
yanhaifeng@hisilicon.com, yanghongwei@hisilicon.com,
suwenping@hisilicon.com, raojun@hisilicon.com,
ml.yang@hisilicon.com, gaofei@hisilicon.com,
zhangzhenxing@hisilicon.com, xuejiancheng@hisilicon.com
Subject: Re: [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc
Date: Wed, 20 Jan 2016 09:43:10 +0800 [thread overview]
Message-ID: <569EE62E.3040003@huawei.com> (raw)
In-Reply-To: <20160119182317.GA3681@rob-hp-laptop>
On 2016/1/20 2:23, Rob Herring wrote:
> On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote:
>> The CRG(Clock and Reset Generator) block provides clock
>> and reset signals for other modules in hi3519 soc.
>>
>> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
>> ---
>> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++
>
> I already acked this. Please add ack's when posting new versions.
>
> Acked-by: Rob Herring <robh@kernel.org>
>
Hi Rob,
I see. Thank you very much.
Regards,
Jiancheng
>> drivers/clk/hisilicon/Kconfig | 7 ++
>> drivers/clk/hisilicon/Makefile | 2 +
>> drivers/clk/hisilicon/clk-hi3519.c | 132 +++++++++++++++++++++
>> drivers/clk/hisilicon/clk.c | 23 ++--
>> drivers/clk/hisilicon/clk.h | 14 +--
>> drivers/clk/hisilicon/reset.c | 130 ++++++++++++++++++++
>> drivers/clk/hisilicon/reset.h | 32 +++++
>> include/dt-bindings/clock/hi3519-clock.h | 40 +++++++
>> 9 files changed, 411 insertions(+), 15 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt
>> create mode 100644 drivers/clk/hisilicon/clk-hi3519.c
>> create mode 100644 drivers/clk/hisilicon/reset.c
>> create mode 100644 drivers/clk/hisilicon/reset.h
>> create mode 100644 include/dt-bindings/clock/hi3519-clock.h
>
> .
>
next prev parent reply other threads:[~2016-01-20 1:43 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-19 2:38 [PATCH v6 0/6] ARM: hisi: Add initial support including clock driver for Hi3519 soc Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 18:23 ` Rob Herring
2016-01-19 18:23 ` Rob Herring
2016-01-20 1:43 ` xuejiancheng [this message]
2016-01-20 1:43 ` xuejiancheng
2016-01-20 1:43 ` xuejiancheng
2016-01-19 2:38 ` [PATCH v6 2/6] ARM: hisi: add compatible string for Hi3519 soc Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` [PATCH v6 3/6] ARM: config: hisi: enable CONFIG_RESET_CONTROLLER Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` [PATCH v6 4/6] ARM: debug: add hi3519 debug uart Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` [PATCH v6 5/6] ARM: dt-bindings: add device tree bindings for Hi3519 sysctrl Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 18:13 ` Rob Herring
2016-01-19 18:13 ` Rob Herring
2016-01-19 2:38 ` [PATCH v6 6/6] ARM: dts: add dts files for Hi3519 Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
2016-01-19 2:38 ` Jiancheng Xue
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