* [PATCHv73/4] tcg: Add type for vCPU pointers
2016-02-17 21:20 [Qemu-devel] [PATCH v70/4] trace: Show vCPU info in guest code events Lluís Vilanova
@ 2016-02-17 21:20 ` Lluís Vilanova
2016-02-17 21:20 ` [Qemu-devel] [PATCHv72/4] trace: Remove unnecessary intermediate event copies Lluís Vilanova
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Lluís Vilanova @ 2016-02-17 21:20 UTC (permalink / raw)
To: qemu-devel
Cc: Alex Bennée, Eric Blake, Eduardo Habkost, Stefan Hajnoczi,
Richard Henderson, Peter Maydell, Edgar E. Iglesias,
Paolo Bonzini, Michael Walle, Aurelien Jarno, Leon Alrae,
Anthony Green, Jia Liu, Alexander Graf, Blue Swirl,
Mark Cave-Ayland, Bastian Koppelmann, Guan Xuetao, Max Filippov,
open list:ARM, open list:PowerPC
Adds the 'TCGv_env' type for pointers to 'CPUArchState' objects. The
tracing infrastructure later needs to differentiate between regular
pointers and pointers to vCPUs.
Also changes all targets to use the new 'TCGv_env' type instead of the
generic 'TCGv_ptr'. As of now, the change is merely cosmetic ('TCGv_env'
translates into 'TCGv_ptr'), but that could change in the future to
enforce the difference.
Note that a 'TCGv_env' type (for 'CPUState') is not added, since all
helpers currently receive the architecture-specific
pointer ('CPUArchState').
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Acked-by: Richard Henderson <rth@twiddle.net>
---
target-alpha/translate.c | 2 +-
target-arm/translate.c | 2 +-
target-arm/translate.h | 2 +-
target-cris/translate.c | 2 +-
target-i386/translate.c | 2 +-
target-lm32/translate.c | 2 +-
target-m68k/translate.c | 2 +-
target-microblaze/translate.c | 2 +-
target-mips/translate.c | 2 +-
target-moxie/translate.c | 2 +-
target-openrisc/translate.c | 2 +-
target-ppc/translate.c | 2 +-
target-s390x/translate.c | 2 +-
target-sh4/translate.c | 2 +-
target-sparc/translate.c | 5 +++--
target-tilegx/translate.c | 2 +-
target-tricore/translate.c | 2 +-
target-unicore32/translate.c | 2 +-
target-xtensa/translate.c | 2 +-
tcg/tcg.h | 1 +
20 files changed, 22 insertions(+), 20 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 7b798b0..5b86992 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -93,7 +93,7 @@ typedef enum {
} ExitStatus;
/* global register indexes */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_std_ir[31];
static TCGv cpu_fir[31];
static TCGv cpu_pc;
diff --git a/target-arm/translate.c b/target-arm/translate.c
index f6a38bc..d2367ab 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -56,7 +56,7 @@
#define IS_USER(s) (s->user)
#endif
-TCGv_ptr cpu_env;
+TCGv_env cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
static TCGv_i32 cpu_R[16];
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 53ef971..82e3f6b 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -70,7 +70,7 @@ typedef struct DisasCompare {
} DisasCompare;
/* Share the TCG temporaries common between 32 and 64 bit modes. */
-extern TCGv_ptr cpu_env;
+extern TCGv_env cpu_env;
extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF;
extern TCGv_i64 cpu_exclusive_addr;
extern TCGv_i64 cpu_exclusive_val;
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 2a283e0..a73176c 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -60,7 +60,7 @@
#define CC_MASK_NZVC 0xf
#define CC_MASK_RNZV 0x10e
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_R[16];
static TCGv cpu_PR[16];
static TCGv cc_x;
diff --git a/target-i386/translate.c b/target-i386/translate.c
index f7ceadd..8fe167b 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -59,7 +59,7 @@
//#define MACRO_TEST 1
/* global register indexes */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_A0;
static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2, cpu_cc_srcT;
static TCGv_i32 cpu_cc_op;
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 3877993..256a51f 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -44,7 +44,7 @@
#define MEM_INDEX 0
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_R[32];
static TCGv cpu_pc;
static TCGv cpu_ie;
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 085cb6a..7560c3a 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -50,7 +50,7 @@
static TCGv_i32 cpu_halted;
static TCGv_i32 cpu_exception_index;
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static char cpu_reg_names[3*8*3 + 5*4];
static TCGv cpu_dregs[8];
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 296c4d7..f944965 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -46,7 +46,7 @@
(((src) >> start) & ((1 << (end - start + 1)) - 1))
static TCGv env_debug;
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_R[32];
static TCGv cpu_SR[18];
static TCGv env_imm;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 658926d..3706176 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1353,7 +1353,7 @@ enum {
};
/* global register indices */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_gpr[32], cpu_PC;
static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC];
static TCGv cpu_dspctrl, btarget, bcond;
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index bc860a5..a437e2a 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -56,7 +56,7 @@ enum {
static TCGv cpu_pc;
static TCGv cpu_gregs[16];
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cc_a, cc_b;
#include "exec/gen-icount.h"
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index d25324e..5d0ab44 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -53,7 +53,7 @@ typedef struct DisasContext {
uint32_t delayed_branch;
} DisasContext;
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_sr;
static TCGv cpu_R[32];
static TCGv cpu_pc;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ffef754..6b9792a 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -49,7 +49,7 @@
/* Code translation helpers */
/* global register indexes */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static char cpu_reg_names[10*3 + 22*4 /* GPR */
+ 10*4 + 22*5 /* SPE GPRh */
+ 10*4 + 22*5 /* FPR */
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 82e1165..c871ef2 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -37,7 +37,7 @@
#include "exec/cpu_ldst.h"
/* global register indexes */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
#include "exec/gen-icount.h"
#include "exec/helper-proto.h"
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index e35d175..7c18968 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -61,7 +61,7 @@ enum {
};
/* global register indexes */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_gregs[24];
static TCGv cpu_sr, cpu_sr_m, cpu_sr_q, cpu_sr_t;
static TCGv cpu_pc, cpu_ssr, cpu_spc, cpu_gbr;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 536c4b5..407b54a 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -39,7 +39,8 @@
according to jump_pc[T2] */
/* global register indexes */
-static TCGv_ptr cpu_env, cpu_regwptr;
+static TCGv_env cpu_env;
+static TCGv_ptr cpu_regwptr;
static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst;
static TCGv_i32 cpu_cc_op;
static TCGv_i32 cpu_psr;
@@ -2291,7 +2292,7 @@ static void gen_fmovq(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
}
#ifndef CONFIG_USER_ONLY
-static inline void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_ptr cpu_env)
+static inline void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_cpu cpu_env)
{
TCGv_i32 r_tl = tcg_temp_new_i32();
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 7073aba..03918eb 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -32,7 +32,7 @@
#define FMT64X "%016" PRIx64
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv cpu_pc;
static TCGv cpu_regs[TILEGX_R_COUNT];
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index a70fdf7..91ed08f 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -47,7 +47,7 @@ static TCGv cpu_PSW_SV;
static TCGv cpu_PSW_AV;
static TCGv cpu_PSW_SAV;
/* CPU env */
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
#include "exec/gen-icount.h"
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 1dd086d..39af3af 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -48,7 +48,7 @@ typedef struct DisasContext {
conditional executions state has been updated. */
#define DISAS_SYSCALL 5
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv_i32 cpu_R[32];
/* FIXME: These should be removed. */
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index fd03603..9894488 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -74,7 +74,7 @@ typedef struct DisasContext {
unsigned cpenable;
} DisasContext;
-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;
static TCGv_i32 cpu_pc;
static TCGv_i32 cpu_R[16];
static TCGv_i32 cpu_FR[16];
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 83da5fb..697f01d 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -308,6 +308,7 @@ typedef tcg_target_ulong TCGArg;
typedef struct TCGv_i32_d *TCGv_i32;
typedef struct TCGv_i64_d *TCGv_i64;
typedef struct TCGv_ptr_d *TCGv_ptr;
+typedef TCGv_ptr TCGv_env;
static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i)
{
^ permalink raw reply related [flat|nested] 9+ messages in thread* [Qemu-devel] [PATCHv74/4] trace: Add 'vcpu' event property to trace guest vCPU
2016-02-17 21:20 [Qemu-devel] [PATCH v70/4] trace: Show vCPU info in guest code events Lluís Vilanova
` (2 preceding siblings ...)
2016-02-17 21:20 ` [Qemu-devel] " Lluís Vilanova
@ 2016-02-17 21:21 ` Lluís Vilanova
2016-02-17 21:33 ` [Qemu-devel] [PATCH v70/4] trace: Show vCPU info in guest code events Lluís Vilanova
4 siblings, 0 replies; 9+ messages in thread
From: Lluís Vilanova @ 2016-02-17 21:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Alex Bennée, Eduardo Habkost, Stefan Hajnoczi
This property identifies events that trace vCPU-specific information.
It adds a "CPUState*" argument to events with the property, identifying
the vCPU raising the event. TCG translation events also have a
"TCGv_env" implicit argument that is later used as the "CPUState*"
argument at execution time.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
---
docs/tracing.txt | 41 +++++++++++++
include/qemu/typedefs.h | 1
scripts/tracetool/__init__.py | 11 +++-
scripts/tracetool/format/h.py | 3 +
scripts/tracetool/format/tcg_h.py | 31 +++++++---
scripts/tracetool/format/tcg_helper_c.py | 35 +++++++++--
scripts/tracetool/format/tcg_helper_h.py | 7 +-
scripts/tracetool/format/tcg_helper_wrapper_h.py | 5 +-
scripts/tracetool/format/ust_events_c.py | 1
scripts/tracetool/transform.py | 4 +
scripts/tracetool/vcpu.py | 69 ++++++++++++++++++++++
trace/control.h | 3 +
12 files changed, 184 insertions(+), 27 deletions(-)
create mode 100644 scripts/tracetool/vcpu.py
diff --git a/docs/tracing.txt b/docs/tracing.txt
index 3853a6a..f5b39e7 100644
--- a/docs/tracing.txt
+++ b/docs/tracing.txt
@@ -347,3 +347,44 @@ This will immediately call:
and will generate the TCG code to call:
void trace_foo(uint8_t a1, uint32_t a2);
+
+=== "vcpu" ===
+
+Identifies events that trace vCPU-specific information. It implicitly adds a
+"CPUState*" argument, and extends the tracing print format to show the vCPU
+information. If used together with the "tcg" property, it adds a second
+"TCGv_cpu" argument that must point to the per-target global TCG register that
+points to the vCPU when guest code is executed (usually the "cpu_env" variable).
+
+The following example events:
+
+ foo(uint32_t a) "a=%x"
+ vcpu bar(uint32_t a) "a=%x"
+ tcg vcpu baz(uint32_t a) "a=%x", "a=%x"
+
+Can be used as:
+
+ #include "trace-tcg.h"
+
+ CPUArchState *env;
+ TCGv_ptr cpu_env;
+
+ void some_disassembly_func(...)
+ {
+ /* trace emitted at this point */
+ trace_foo(0xd1);
+ /* trace emitted at this point */
+ trace_bar(ENV_GET_CPU(env), 0xd2);
+ /* trace emitted at this point (env) and when guest code is executed (cpu_env) */
+ trace_baz_tcg(ENV_GET_CPU(env), cpu_env, 0xd3);
+ }
+
+If the translating vCPU has address 0xc1 and code is later executed by vCPU
+0xc2, this would be an example output:
+
+ // at guest code translation
+ foo a=0xd1
+ bar cpu=0xc1 a=0xd2
+ baz_trans cpu=0xc1 a=0xd3
+ // at guest code execution
+ baz_exec cpu=0xc2 a=0xd3
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
index 6ed91b4..9a5ead6 100644
--- a/include/qemu/typedefs.h
+++ b/include/qemu/typedefs.h
@@ -18,6 +18,7 @@ typedef struct BusState BusState;
typedef struct CharDriverState CharDriverState;
typedef struct CompatProperty CompatProperty;
typedef struct CPUAddressSpace CPUAddressSpace;
+typedef struct CPUState CPUState;
typedef struct DeviceListener DeviceListener;
typedef struct DeviceState DeviceState;
typedef struct DisplayChangeListener DisplayChangeListener;
diff --git a/scripts/tracetool/__init__.py b/scripts/tracetool/__init__.py
index 26878f4..d32bfa7 100644
--- a/scripts/tracetool/__init__.py
+++ b/scripts/tracetool/__init__.py
@@ -157,7 +157,7 @@ class Event(object):
"(?:(?:(?P<fmt_trans>\".+),)?\s*(?P<fmt>\".+))?"
"\s*")
- _VALID_PROPS = set(["disable", "tcg", "tcg-trans", "tcg-exec"])
+ _VALID_PROPS = set(["disable", "tcg", "tcg-trans", "tcg-exec", "vcpu"])
def __init__(self, name, props, fmt, args, orig=None):
"""
@@ -226,7 +226,13 @@ class Event(object):
if "tcg" in props and isinstance(fmt, str):
raise ValueError("Events with 'tcg' property must have two formats")
- return Event(name, props, fmt, args)
+ event = Event(name, props, fmt, args)
+
+ # add implicit arguments when using the 'vcpu' property
+ import tracetool.vcpu
+ event = tracetool.vcpu.transform_event(event)
+
+ return event
def __repr__(self):
"""Evaluable string representation for this object."""
@@ -281,6 +287,7 @@ def _read_events(fobj):
event_trans.name += "_trans"
event_trans.properties += ["tcg-trans"]
event_trans.fmt = event.fmt[0]
+ # ignore TCG arguments
args_trans = []
for atrans, aorig in zip(
event_trans.transform(tracetool.transform.TCG_2_HOST).args,
diff --git a/scripts/tracetool/format/h.py b/scripts/tracetool/format/h.py
index 9b39430..2bd68a2 100644
--- a/scripts/tracetool/format/h.py
+++ b/scripts/tracetool/format/h.py
@@ -6,7 +6,7 @@ trace/generated-tracers.h
"""
__author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
-__copyright__ = "Copyright 2012-2014, Lluís Vilanova <vilanova@ac.upc.edu>"
+__copyright__ = "Copyright 2012-2016, Lluís Vilanova <vilanova@ac.upc.edu>"
__license__ = "GPL version 2 or (at your option) any later version"
__maintainer__ = "Stefan Hajnoczi"
@@ -23,6 +23,7 @@ def generate(events, backend):
'#define TRACE__GENERATED_TRACERS_H',
'',
'#include "qemu-common.h"',
+ '#include "qemu/typedefs.h"',
'')
backend.generate_begin(events)
diff --git a/scripts/tracetool/format/tcg_h.py b/scripts/tracetool/format/tcg_h.py
index 0d2cf79..e24eb09 100644
--- a/scripts/tracetool/format/tcg_h.py
+++ b/scripts/tracetool/format/tcg_h.py
@@ -13,7 +13,18 @@ __maintainer__ = "Stefan Hajnoczi"
__email__ = "stefanha@linux.vnet.ibm.com"
-from tracetool import out
+from tracetool import out, Arguments
+import tracetool.vcpu
+
+
+def vcpu_transform_args(args):
+ assert len(args) == 1
+ return Arguments([
+ args,
+ # NOTE: this name must be kept in sync with the one in "tcg_h"
+ # NOTE: Current helper code uses TCGv_env (CPUArchState*)
+ ("TCGv_env", "__tcg_" + args.names()[0]),
+ ])
def generate(events, backend):
@@ -35,21 +46,21 @@ def generate(events, backend):
if "tcg-trans" not in e.properties:
continue
- # get the original event definition
- e = e.original
-
out('static inline void %(name_tcg)s(%(args)s)',
'{',
- name_tcg=e.api(e.QEMU_TRACE_TCG),
- args=e.args)
+ name_tcg=e.original.api(e.QEMU_TRACE_TCG),
+ args=tracetool.vcpu.transform_args("tcg_h", e))
if "disable" not in e.properties:
+ args_trans = e.original.event_exec.args
+ args_exec = tracetool.vcpu.transform_args(
+ "tcg_helper_c", e.original.event_exec, "wrapper")
out(' %(name_trans)s(%(argnames_trans)s);',
' gen_helper_%(name_exec)s(%(argnames_exec)s);',
- name_trans=e.event_trans.api(e.QEMU_TRACE),
- name_exec=e.event_exec.api(e.QEMU_TRACE),
- argnames_trans=", ".join(e.event_trans.args.names()),
- argnames_exec=", ".join(e.event_exec.args.names()))
+ name_trans=e.original.event_trans.api(e.QEMU_TRACE),
+ name_exec=e.original.event_exec.api(e.QEMU_TRACE),
+ argnames_trans=", ".join(args_trans.names()),
+ argnames_exec=", ".join(args_exec.names()))
out('}')
diff --git a/scripts/tracetool/format/tcg_helper_c.py b/scripts/tracetool/format/tcg_helper_c.py
index 96655a0..62ddb51 100644
--- a/scripts/tracetool/format/tcg_helper_c.py
+++ b/scripts/tracetool/format/tcg_helper_c.py
@@ -6,15 +6,38 @@ Generate trace/generated-helpers.c.
"""
__author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
-__copyright__ = "Copyright 2012-2014, Lluís Vilanova <vilanova@ac.upc.edu>"
+__copyright__ = "Copyright 2012-2016, Lluís Vilanova <vilanova@ac.upc.edu>"
__license__ = "GPL version 2 or (at your option) any later version"
__maintainer__ = "Stefan Hajnoczi"
__email__ = "stefanha@linux.vnet.ibm.com"
-from tracetool import out
+from tracetool import Arguments, out
from tracetool.transform import *
+import tracetool.vcpu
+
+
+def vcpu_transform_args(args, mode):
+ assert len(args) == 1
+ # NOTE: this name must be kept in sync with the one in "tcg_h"
+ args = Arguments([(args.types()[0], "__tcg_" + args.names()[0])])
+ if mode == "code":
+ return Arguments([
+ # Does cast from helper requirements to tracing types
+ ("CPUState *", "ENV_GET_CPU(%s)" % args.names()[0]),
+ ])
+ else:
+ args = Arguments([
+ # NOTE: Current helper code uses TCGv_env (CPUArchState*)
+ ("CPUArchState *", args.names()[0]),
+ ])
+ if mode == "header":
+ return args
+ elif mode == "wrapper":
+ return args.transform(HOST_2_TCG)
+ else:
+ assert False
def generate(events, backend):
@@ -33,11 +56,11 @@ def generate(events, backend):
if "tcg-exec" not in e.properties:
continue
- # tracetool.generate always transforms types to host
- e_args = e.original.args
+ e_args_api = tracetool.vcpu.transform_args("tcg_helper_c", e, "header")
+ e_args_code = tracetool.vcpu.transform_args("tcg_helper_c", e, "code")
values = ["(%s)%s" % (t, n)
- for t, n in e.args.transform(TCG_2_TCG_HELPER_DEF)]
+ for t, n in e_args_code.transform(TCG_2_TCG_HELPER_DEF)]
out('void %(name_tcg)s(%(args)s)',
'{',
@@ -45,6 +68,6 @@ def generate(events, backend):
'}',
name_tcg="helper_%s_proxy" % e.api(),
name=e.api(),
- args=e_args.transform(HOST_2_TCG_COMPAT, TCG_2_TCG_HELPER_DEF),
+ args=e_args_api.transform(HOST_2_TCG_COMPAT, TCG_2_TCG_HELPER_DEF),
values=", ".join(values),
)
diff --git a/scripts/tracetool/format/tcg_helper_h.py b/scripts/tracetool/format/tcg_helper_h.py
index a8ba7ba..07dfcc1 100644
--- a/scripts/tracetool/format/tcg_helper_h.py
+++ b/scripts/tracetool/format/tcg_helper_h.py
@@ -6,7 +6,7 @@ Generate trace/generated-helpers.h.
"""
__author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
-__copyright__ = "Copyright 2012-2014, Lluís Vilanova <vilanova@ac.upc.edu>"
+__copyright__ = "Copyright 2012-2016, Lluís Vilanova <vilanova@ac.upc.edu>"
__license__ = "GPL version 2 or (at your option) any later version"
__maintainer__ = "Stefan Hajnoczi"
@@ -15,6 +15,7 @@ __email__ = "stefanha@linux.vnet.ibm.com"
from tracetool import out
from tracetool.transform import *
+import tracetool.vcpu
def generate(events, backend):
@@ -29,11 +30,9 @@ def generate(events, backend):
if "tcg-exec" not in e.properties:
continue
- # tracetool.generate always transforms types to host
- e_args = e.original.args
-
# TCG helper proxy declaration
fmt = "DEF_HELPER_FLAGS_%(argc)d(%(name)s, %(flags)svoid%(types)s)"
+ e_args = tracetool.vcpu.transform_args("tcg_helper_c", e, "header")
args = e_args.transform(HOST_2_TCG_COMPAT, HOST_2_TCG,
TCG_2_TCG_HELPER_DECL)
types = ", ".join(args.types())
diff --git a/scripts/tracetool/format/tcg_helper_wrapper_h.py b/scripts/tracetool/format/tcg_helper_wrapper_h.py
index cac5a87..494dd63 100644
--- a/scripts/tracetool/format/tcg_helper_wrapper_h.py
+++ b/scripts/tracetool/format/tcg_helper_wrapper_h.py
@@ -6,7 +6,7 @@ Generate trace/generated-helpers-wrappers.h.
"""
__author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
-__copyright__ = "Copyright 2012-2014, Lluís Vilanova <vilanova@ac.upc.edu>"
+__copyright__ = "Copyright 2012-2016, Lluís Vilanova <vilanova@ac.upc.edu>"
__license__ = "GPL version 2 or (at your option) any later version"
__maintainer__ = "Stefan Hajnoczi"
@@ -15,6 +15,7 @@ __email__ = "stefanha@linux.vnet.ibm.com"
from tracetool import out
from tracetool.transform import *
+import tracetool.vcpu
def generate(events, backend):
@@ -33,7 +34,7 @@ def generate(events, backend):
continue
# tracetool.generate always transforms types to host
- e_args = e.original.args
+ e_args = tracetool.vcpu.transform_args("tcg_helper_c", e, "wrapper")
# mixed-type to TCG helper bridge
args_tcg_compat = e_args.transform(HOST_2_TCG_COMPAT)
diff --git a/scripts/tracetool/format/ust_events_c.py b/scripts/tracetool/format/ust_events_c.py
index bc97093..ecb1f23 100644
--- a/scripts/tracetool/format/ust_events_c.py
+++ b/scripts/tracetool/format/ust_events_c.py
@@ -30,4 +30,5 @@ def generate(events, backend):
' */',
'#pragma GCC diagnostic ignored "-Wredundant-decls"',
'',
+ '#include "qemu/typedefs.h"',
'#include "generated-ust-provider.h"')
diff --git a/scripts/tracetool/transform.py b/scripts/tracetool/transform.py
index fc5e679..e18b053 100644
--- a/scripts/tracetool/transform.py
+++ b/scripts/tracetool/transform.py
@@ -6,7 +6,7 @@ Type-transformation rules.
"""
__author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
-__copyright__ = "Copyright 2012-2014, Lluís Vilanova <vilanova@ac.upc.edu>"
+__copyright__ = "Copyright 2012-2016, Lluís Vilanova <vilanova@ac.upc.edu>"
__license__ = "GPL version 2 or (at your option) any later version"
__maintainer__ = "Stefan Hajnoczi"
@@ -98,6 +98,7 @@ HOST_2_TCG = {
"uint32_t": "TCGv_i32",
"uint64_t": "TCGv_i64",
"void *" : "TCGv_ptr",
+ "CPUArchState *": "TCGv_env",
None: _host_2_tcg,
}
@@ -130,6 +131,7 @@ TCG_2_TCG_HELPER_DECL = {
"TCGv_ptr": "ptr",
"TCGv_i32": "i32",
"TCGv_i64": "i64",
+ "TCGv_env": "env",
None: _tcg_2_tcg_helper_decl_error,
}
diff --git a/scripts/tracetool/vcpu.py b/scripts/tracetool/vcpu.py
new file mode 100644
index 0000000..6a7d352
--- /dev/null
+++ b/scripts/tracetool/vcpu.py
@@ -0,0 +1,69 @@
+#!/usr/bin/env python
+# -*- coding: utf-8 -*-
+
+"""
+Generic management for the 'vcpu' property.
+
+"""
+
+__author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
+__copyright__ = "Copyright 2016, Lluís Vilanova <vilanova@ac.upc.edu>"
+__license__ = "GPL version 2 or (at your option) any later version"
+
+__maintainer__ = "Stefan Hajnoczi"
+__email__ = "stefanha@linux.vnet.ibm.com"
+
+
+from tracetool import Arguments, try_import
+
+
+def transform_event(event):
+ """Transform event to comply with the 'vcpu' property (if present)."""
+ if "vcpu" in event.properties:
+ # events with 'tcg-trans' and 'tcg-exec' are auto-generated from
+ # already-patched events
+ assert "tcg-trans" not in event.properties
+ assert "tcg-exec" not in event.properties
+
+ event.args = Arguments([("CPUState *", "__cpu"), event.args])
+ if "tcg" in event.properties:
+ fmt = "\"cpu=%p \""
+ event.fmt = [fmt + event.fmt[0],
+ fmt + event.fmt[0]]
+ else:
+ event.fmt = fmt + event.fmt
+ return event
+
+
+def transform_args(format, event, *args, **kwargs):
+ """Transforms the arguments to suit the specified format.
+
+ The format module must implement function 'vcpu_args', which receives the
+ implicit arguments added by the 'vcpu' property, and must return suitable
+ arguments for the given format.
+
+ The function is only called for events with the 'vcpu' property.
+
+ Parameters
+ ==========
+ format : str
+ Format module name.
+ event : Event
+ args, kwargs
+ Passed to 'vcpu_transform_args'.
+
+ Returns
+ =======
+ Arguments
+ The transformed arguments, including the non-implicit ones.
+
+ """
+ if "vcpu" in event.properties:
+ ok, func = try_import("tracetool.format." + format,
+ "vcpu_transform_args")
+ assert ok
+ assert func
+ return Arguments([func(event.args[:1], *args, **kwargs),
+ event.args[1:]])
+ else:
+ return event.args
diff --git a/trace/control.h b/trace/control.h
index d5bc86e..f0fe535 100644
--- a/trace/control.h
+++ b/trace/control.h
@@ -1,7 +1,7 @@
/*
* Interface for configuring and controlling the state of tracing events.
*
- * Copyright (C) 2011-2014 Lluís Vilanova <vilanova@ac.upc.edu>
+ * Copyright (C) 2011-2016 Lluís Vilanova <vilanova@ac.upc.edu>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -11,6 +11,7 @@
#define TRACE__CONTROL_H
#include "qemu-common.h"
+#include "qemu/typedefs.h"
#include "trace/generated-events.h"
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